2020-11-05 10:15:15 +00:00
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/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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#ifndef _SIMD_COMMON_H_
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#define _SIMD_COMMON_H_
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#include "../aot_compiler.h"
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2021-09-17 11:12:57 +00:00
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static inline bool
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is_target_x86(AOTCompContext *comp_ctx)
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{
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return !strncmp(comp_ctx->target_arch, "x86_64", 6)
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|| !strncmp(comp_ctx->target_arch, "i386", 4);
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}
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2020-11-05 10:15:15 +00:00
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LLVMValueRef
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simd_pop_v128_and_bitcast(const AOTCompContext *comp_ctx,
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2021-10-13 07:13:00 +00:00
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const AOTFuncContext *func_ctx, LLVMTypeRef vec_type,
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2020-11-05 10:15:15 +00:00
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const char *name);
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bool
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simd_bitcast_and_push_v128(const AOTCompContext *comp_ctx,
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2021-10-13 07:13:00 +00:00
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const AOTFuncContext *func_ctx, LLVMValueRef vector,
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2020-11-05 10:15:15 +00:00
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const char *name);
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2021-09-17 11:12:57 +00:00
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LLVMValueRef
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simd_lane_id_to_llvm_value(AOTCompContext *comp_ctx, uint8 lane_id);
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LLVMValueRef
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simd_build_const_integer_vector(const AOTCompContext *comp_ctx,
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const LLVMTypeRef element_type,
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2021-10-13 07:13:00 +00:00
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const int *element_value, uint32 length);
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2021-09-17 11:12:57 +00:00
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LLVMValueRef
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simd_build_splat_const_integer_vector(const AOTCompContext *comp_ctx,
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const LLVMTypeRef element_type,
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2021-10-13 07:13:00 +00:00
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const int64 element_value, uint32 length);
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2021-09-17 11:12:57 +00:00
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LLVMValueRef
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simd_build_splat_const_float_vector(const AOTCompContext *comp_ctx,
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const LLVMTypeRef element_type,
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2021-10-13 07:13:00 +00:00
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const float element_value, uint32 length);
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2020-11-05 10:15:15 +00:00
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#endif /* _SIMD_COMMON_H_ */
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