diff --git a/core/iwasm/fast-jit/cg/x86-64/jit_codegen_x86_64.cpp b/core/iwasm/fast-jit/cg/x86-64/jit_codegen_x86_64.cpp
index 811ed9673..2110b9fcd 100644
--- a/core/iwasm/fast-jit/cg/x86-64/jit_codegen_x86_64.cpp
+++ b/core/iwasm/fast-jit/cg/x86-64/jit_codegen_x86_64.cpp
@@ -3958,7 +3958,7 @@ shift_r_imm_to_r_i64(x86::Assembler &a, SHIFT_OP op, int32 reg_no_dst,
         }
         case ROTL:
         {
-            a.ror(regs_i64[reg_no_dst], imm);
+            a.rol(regs_i64[reg_no_dst], imm);
             break;
         }
         case ROTR:
diff --git a/core/iwasm/fast-jit/fe/jit_emit_function.c b/core/iwasm/fast-jit/fe/jit_emit_function.c
index 761c20e88..29201a1d1 100644
--- a/core/iwasm/fast-jit/fe/jit_emit_function.c
+++ b/core/iwasm/fast-jit/fe/jit_emit_function.c
@@ -167,6 +167,8 @@ jit_compile_op_call(JitCompContext *cc, uint32 func_idx, bool tail_call)
                                  3)) {
             return false;
         }
+        /* Convert bool to uint32 */
+        GEN_INSN(AND, native_ret, native_ret, NEW_CONST(I32, 0xFF));
 
         /* Check whether there is exception thrown */
         GEN_INSN(CMP, cc->cmp_reg, native_ret, NEW_CONST(I32, 0));
@@ -339,6 +341,8 @@ jit_compile_op_call_indirect(JitCompContext *cc, uint32 type_idx,
     if (!jit_emit_callnative(cc, jit_call_indirect, native_ret, arg_regs, 6)) {
         return false;
     }
+    /* Convert bool to uint32 */
+    GEN_INSN(AND, native_ret, native_ret, NEW_CONST(I32, 0xFF));
 
     /* Check whether there is exception thrown */
     GEN_INSN(CMP, cc->cmp_reg, native_ret, NEW_CONST(I32, 0));
diff --git a/core/iwasm/fast-jit/fe/jit_emit_memory.c b/core/iwasm/fast-jit/fe/jit_emit_memory.c
index c162d94cc..f985b6193 100644
--- a/core/iwasm/fast-jit/fe/jit_emit_memory.c
+++ b/core/iwasm/fast-jit/fe/jit_emit_memory.c
@@ -507,6 +507,8 @@ jit_compile_op_memory_grow(JitCompContext *cc, uint32 mem_idx)
     if (!jit_emit_callnative(cc, wasm_enlarge_memory, grow_res, args, 2)) {
         goto fail;
     }
+    /* Convert bool to uint32 */
+    GEN_INSN(AND, grow_res, grow_res, NEW_CONST(I32, 0xFF));
 
     /* Check if enlarge memory success */
     res = jit_cc_new_reg_I32(cc);
diff --git a/core/iwasm/fast-jit/fe/jit_emit_numberic.c b/core/iwasm/fast-jit/fe/jit_emit_numberic.c
index e11a0de2a..fe312edcb 100644
--- a/core/iwasm/fast-jit/fe/jit_emit_numberic.c
+++ b/core/iwasm/fast-jit/fe/jit_emit_numberic.c
@@ -1050,10 +1050,14 @@ do_i64_const_shru(int64 lhs, int64 rhs)
     return (uint64)lhs >> rhs;
 }
 
+typedef enum { SHL, SHRS, SHRU, ROTL, ROTR } SHIFT_OP;
+
 static JitReg
-compile_int_shift_modulo(JitCompContext *cc, JitReg rhs, bool is_i32)
+compile_int_shift_modulo(JitCompContext *cc, JitReg rhs, bool is_i32,
+                         SHIFT_OP op)
 {
     JitReg res;
+
     if (jit_reg_is_const(rhs)) {
         if (is_i32) {
             int32 val = jit_cc_get_const_I32(cc, rhs);
@@ -1067,7 +1071,12 @@ compile_int_shift_modulo(JitCompContext *cc, JitReg rhs, bool is_i32)
         }
     }
     else {
-        if (is_i32) {
+        if (op == ROTL || op == ROTR) {
+            /* No need to generate AND insn as the result
+               is same for rotate shift */
+            res = rhs;
+        }
+        else if (is_i32) {
             res = jit_cc_new_reg_I32(cc);
             GEN_INSN(AND, res, rhs, NEW_CONST(I32, 0x1f));
         }
@@ -1076,6 +1085,7 @@ compile_int_shift_modulo(JitCompContext *cc, JitReg rhs, bool is_i32)
             GEN_INSN(AND, res, rhs, NEW_CONST(I64, 0x3f));
         }
     }
+
     return res;
 }
 
@@ -1101,7 +1111,7 @@ compile_int_shl(JitCompContext *cc, JitReg left, JitReg right, bool is_i32)
     JitInsn *insn = NULL;
 #endif
 
-    right = compile_int_shift_modulo(cc, right, is_i32);
+    right = compile_int_shift_modulo(cc, right, is_i32, SHL);
 
     res = CHECK_AND_PROCESS_INT_CONSTS(cc, left, right, is_i32, shl);
     if (res)
@@ -1132,7 +1142,7 @@ compile_int_shrs(JitCompContext *cc, JitReg left, JitReg right, bool is_i32)
     JitInsn *insn = NULL;
 #endif
 
-    right = compile_int_shift_modulo(cc, right, is_i32);
+    right = compile_int_shift_modulo(cc, right, is_i32, SHRS);
 
     res = CHECK_AND_PROCESS_INT_CONSTS(cc, left, right, is_i32, shrs);
     if (res)
@@ -1163,7 +1173,7 @@ compile_int_shru(JitCompContext *cc, JitReg left, JitReg right, bool is_i32)
     JitInsn *insn = NULL;
 #endif
 
-    right = compile_int_shift_modulo(cc, right, is_i32);
+    right = compile_int_shift_modulo(cc, right, is_i32, SHRU);
 
     res = CHECK_AND_PROCESS_INT_CONSTS(cc, left, right, is_i32, shru);
     if (res)
@@ -1225,7 +1235,7 @@ compile_int_rotl(JitCompContext *cc, JitReg left, JitReg right, bool is_i32)
     JitInsn *insn = NULL;
 #endif
 
-    right = compile_int_shift_modulo(cc, right, is_i32);
+    right = compile_int_shift_modulo(cc, right, is_i32, ROTL);
 
     res = CHECK_AND_PROCESS_INT_CONSTS(cc, left, right, is_i32, rotl);
     if (res)
@@ -1287,7 +1297,7 @@ compile_int_rotr(JitCompContext *cc, JitReg left, JitReg right, bool is_i32)
     JitInsn *insn = NULL;
 #endif
 
-    right = compile_int_shift_modulo(cc, right, is_i32);
+    right = compile_int_shift_modulo(cc, right, is_i32, ROTR);
 
     res = CHECK_AND_PROCESS_INT_CONSTS(cc, left, right, is_i32, rotr);
     if (res)
diff --git a/core/iwasm/interpreter/wasm_loader.c b/core/iwasm/interpreter/wasm_loader.c
index e0b35d057..f5393150d 100644
--- a/core/iwasm/interpreter/wasm_loader.c
+++ b/core/iwasm/interpreter/wasm_loader.c
@@ -3261,9 +3261,10 @@ load_from_sections(WASMModule *module, WASMSection *sections,
 #if WASM_ENABLE_FAST_JIT != 0
     calculate_global_data_offset(module);
 
-    if (!(module->fast_jit_func_ptrs =
-              loader_malloc(sizeof(void *) * module->function_count, error_buf,
-                            error_buf_size))) {
+    if (module->function_count
+        && !(module->fast_jit_func_ptrs =
+                 loader_malloc(sizeof(void *) * module->function_count,
+                               error_buf, error_buf_size))) {
         return false;
     }
     if (!jit_compiler_compile_all(module)) {