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Correct DPFPU and FPU handling for NuttX (#1027)

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Since DPFPU depends on FPU, if FPU is enabled we will never enter DPFPU
branch since `ifeq (${CONFIG_ARCH_FPU}, y)` is always true.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi 2022-03-08 13:31:38 +08:00 committed by GitHub
parent 60595d72e1
commit 0065743075
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 8 additions and 8 deletions
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16
product-mini/platforms/nuttx/wamr.mk
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@ -74,12 +74,12 @@ else ifeq (${WAMR_BUILD_TARGET}, XTENSA)
AOT_RELOC := aot_reloc_xtensa.c
else ifeq (${WAMR_BUILD_TARGET}, RISCV64)
ifeq (${CONFIG_ARCH_FPU},y)
$(error riscv64 lp64f is unsupported)
else ifeq (${CONFIG_ARCH_DPFPU}, y)
ifeq (${CONFIG_ARCH_DPFPU},y)
CFLAGS += -DBUILD_TARGET_RISCV64_LP64D
else
else ifneq (${CONFIG_ARCH_FPU},y)
CFLAGS += -DBUILD_TARGET_RISCV64_LP64
else
$(error riscv64 lp64f is unsupported)
endif
INVOKE_NATIVE += invokeNative_riscv.S
@ -87,12 +87,12 @@ endif
else ifeq (${WAMR_BUILD_TARGET}, RISCV32)
ifeq (${CONFIG_ARCH_FPU}, y)
$(error riscv32 ilp32f is unsupported)
else ifeq (${CONFIG_ARCH_DPFPU}, y)
ifeq (${CONFIG_ARCH_DPFPU},y)
CFLAGS += -DBUILD_TARGET_RISCV32_ILP32D
else
else ifneq (${CONFIG_ARCH_FPU},y)
CFLAGS += -DBUILD_TARGET_RISCV32_ILP32
else
$(error riscv32 ilp32f is unsupported)
endif
INVOKE_NATIVE += invokeNative_riscv.S