diff --git a/core/iwasm/interpreter/wasm_interp_fast.c b/core/iwasm/interpreter/wasm_interp_fast.c index 12d168cdf..a39828406 100644 --- a/core/iwasm/interpreter/wasm_interp_fast.c +++ b/core/iwasm/interpreter/wasm_interp_fast.c @@ -5837,8 +5837,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, { uint32 offset, addr; offset = read_uint32(frame_ip); - addr = GET_OPERAND(uint32, I32, 0); - frame_ip += 2; + addr = POP_I32(); addr_ret = GET_OFFSET(); CHECK_MEMORY_OVERFLOW(16); PUT_V128_TO_ADDR(frame_lp + addr_ret, LOAD_V128(maddr)); @@ -5932,10 +5931,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, uint32 offset, addr; offset = read_uint32(frame_ip); V128 data = POP_V128(); - int32 base = POP_I32(); - offset += base; - addr = GET_OPERAND(uint32, I32, 0); - + addr = POP_I32(); CHECK_MEMORY_OVERFLOW(16); STORE_V128(maddr, data); break; @@ -6183,7 +6179,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_lt_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_lt); + SIMD_DOUBLE_OP(simde_wasm_u8x16_lt); break; } case SIMD_i8x16_gt_s: @@ -6193,7 +6189,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_gt_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_gt); + SIMD_DOUBLE_OP(simde_wasm_u8x16_gt); break; } case SIMD_i8x16_le_s: @@ -6203,7 +6199,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_le_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_le); + SIMD_DOUBLE_OP(simde_wasm_u8x16_le); break; } case SIMD_i8x16_ge_s: @@ -6213,7 +6209,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_ge_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_ge); + SIMD_DOUBLE_OP(simde_wasm_u8x16_ge); break; } @@ -6235,7 +6231,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_lt_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_lt); + SIMD_DOUBLE_OP(simde_wasm_u16x8_lt); break; } case SIMD_i16x8_gt_s: @@ -6245,7 +6241,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_gt_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_gt); + SIMD_DOUBLE_OP(simde_wasm_u16x8_gt); break; } case SIMD_i16x8_le_s: @@ -6255,7 +6251,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_le_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_le); + SIMD_DOUBLE_OP(simde_wasm_u16x8_le); break; } case SIMD_i16x8_ge_s: @@ -6265,7 +6261,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_ge_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_ge); + SIMD_DOUBLE_OP(simde_wasm_u16x8_ge); break; } @@ -6287,7 +6283,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_lt_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_lt); + SIMD_DOUBLE_OP(simde_wasm_u32x4_lt); break; } case SIMD_i32x4_gt_s: @@ -6297,7 +6293,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_gt_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_gt); + SIMD_DOUBLE_OP(simde_wasm_u32x4_gt); break; } case SIMD_i32x4_le_s: @@ -6307,7 +6303,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_le_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_le); + SIMD_DOUBLE_OP(simde_wasm_u32x4_le); break; } case SIMD_i32x4_ge_s: @@ -6317,7 +6313,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_ge_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_ge); + SIMD_DOUBLE_OP(simde_wasm_u32x4_ge); break; } @@ -6356,32 +6352,32 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, /* f64x2 comparison operations */ case SIMD_f64x2_eq: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_eq); + SIMD_DOUBLE_OP(simde_wasm_f64x2_eq); break; } case SIMD_f64x2_ne: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_ne); + SIMD_DOUBLE_OP(simde_wasm_f64x2_ne); break; } case SIMD_f64x2_lt: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_lt); + SIMD_DOUBLE_OP(simde_wasm_f64x2_lt); break; } case SIMD_f64x2_gt: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_gt); + SIMD_DOUBLE_OP(simde_wasm_f64x2_gt); break; } case SIMD_f64x2_le: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_le); + SIMD_DOUBLE_OP(simde_wasm_f64x2_le); break; } case SIMD_f64x2_ge: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_ge); + SIMD_DOUBLE_OP(simde_wasm_f64x2_ge); break; } @@ -6464,7 +6460,6 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, #define SIMD_LOAD_LANE_COMMON(vec, register, lane, width) \ do { \ - addr = GET_OPERAND(uint32, I32, 0); \ addr_ret = GET_OFFSET(); \ CHECK_MEMORY_OVERFLOW(width / 8); \ if (width == 64) { \ @@ -6481,8 +6476,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, uint32 offset, addr; \ offset = read_uint32(frame_ip); \ V128 vec = POP_V128(); \ - int32 base = POP_I32(); \ - offset += base; \ + addr = POP_I32(); \ int lane = *frame_ip++; \ SIMD_LOAD_LANE_COMMON(vec, register, lane, width); \ } while (0) @@ -6512,11 +6506,8 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, uint32 offset, addr; \ offset = read_uint32(frame_ip); \ V128 vec = POP_V128(); \ - int32 base = POP_I32(); \ - offset += base; \ + addr = POP_I32(); \ int lane = *frame_ip++; \ - addr = GET_OPERAND(uint32, I32, 0); \ - addr_ret = GET_OFFSET(); \ CHECK_MEMORY_OVERFLOW(width / 8); \ if (width == 64) { \ STORE_I64(maddr, vec.register[lane]); \ @@ -6553,8 +6544,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, do { \ uint32 offset, addr; \ offset = read_uint32(frame_ip); \ - int32 base = POP_I32(); \ - offset += base; \ + addr = POP_I32(); \ int32 lane = 0; \ V128 vec = { 0 }; \ SIMD_LOAD_LANE_COMMON(vec, register, lane, width); \ @@ -6642,7 +6632,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_narrow_i16x8_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_narrow_i16x8); + SIMD_DOUBLE_OP(simde_wasm_u8x16_narrow_i16x8); break; } case SIMD_f32x4_ceil: @@ -6692,7 +6682,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_shr_u: { - SIMD_LANE_SHIFT(simde_wasm_i8x16_shr); + SIMD_LANE_SHIFT(simde_wasm_u8x16_shr); break; } case SIMD_i8x16_add: @@ -6707,7 +6697,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_add_sat_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_add_sat); + SIMD_DOUBLE_OP(simde_wasm_u8x16_add_sat); break; } case SIMD_i8x16_sub: @@ -6722,7 +6712,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_sub_sat_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_sub_sat); + SIMD_DOUBLE_OP(simde_wasm_u8x16_sub_sat); break; } case SIMD_f64x2_ceil: @@ -6742,7 +6732,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_min_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_min); + SIMD_DOUBLE_OP(simde_wasm_u8x16_min); break; } case SIMD_i8x16_max_s: @@ -6752,7 +6742,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_max_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_max); + SIMD_DOUBLE_OP(simde_wasm_u8x16_max); break; } case SIMD_f64x2_trunc: @@ -6772,7 +6762,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_extadd_pairwise_i8x16_u: { - SIMD_SINGLE_OP(simde_wasm_i16x8_extadd_pairwise_i8x16); + SIMD_SINGLE_OP(simde_wasm_u16x8_extadd_pairwise_u8x16); break; } case SIMD_i32x4_extadd_pairwise_i16x8_s: @@ -6782,7 +6772,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_extadd_pairwise_i16x8_u: { - SIMD_SINGLE_OP(simde_wasm_i32x4_extadd_pairwise_i16x8); + SIMD_SINGLE_OP(simde_wasm_u32x4_extadd_pairwise_u16x8); break; } @@ -6831,7 +6821,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_narrow_i32x4_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_narrow_i32x4); + SIMD_DOUBLE_OP(simde_wasm_u16x8_narrow_i32x4); break; } case SIMD_i16x8_extend_low_i8x16_s: @@ -6846,12 +6836,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_extend_low_i8x16_u: { - SIMD_SINGLE_OP(simde_wasm_i16x8_extend_low_i8x16); + SIMD_SINGLE_OP(simde_wasm_u16x8_extend_low_u8x16); break; } case SIMD_i16x8_extend_high_i8x16_u: { - SIMD_SINGLE_OP(simde_wasm_i16x8_extend_high_i8x16); + SIMD_SINGLE_OP(simde_wasm_u16x8_extend_high_u8x16); break; } case SIMD_i16x8_shl: @@ -6866,7 +6856,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_shr_u: { - SIMD_LANE_SHIFT(simde_wasm_i16x8_shr); + SIMD_LANE_SHIFT(simde_wasm_u16x8_shr); break; } case SIMD_i16x8_add: @@ -6881,7 +6871,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_add_sat_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_add_sat); + SIMD_DOUBLE_OP(simde_wasm_u16x8_add_sat); break; } case SIMD_i16x8_sub: @@ -6896,7 +6886,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_sub_sat_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_sub_sat); + SIMD_DOUBLE_OP(simde_wasm_u16x8_sub_sat); break; } case SIMD_f64x2_nearest: @@ -6916,7 +6906,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_min_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_min); + SIMD_DOUBLE_OP(simde_wasm_u16x8_min); break; } case SIMD_i16x8_max_s: @@ -6926,7 +6916,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_max_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_max); + SIMD_DOUBLE_OP(simde_wasm_u16x8_max); break; } case SIMD_i16x8_avgr_u: @@ -6946,12 +6936,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_extmul_low_i8x16_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_extmul_low_i8x16); + SIMD_DOUBLE_OP(simde_wasm_u16x8_extmul_low_u8x16); break; } case SIMD_i16x8_extmul_high_i8x16_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_extmul_high_i8x16); + SIMD_DOUBLE_OP(simde_wasm_u16x8_extmul_high_u8x16); break; } @@ -7000,12 +6990,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_extend_low_i16x8_u: { - SIMD_SINGLE_OP(simde_wasm_i32x4_extend_low_i16x8); + SIMD_SINGLE_OP(simde_wasm_u32x4_extend_low_u16x8); break; } case SIMD_i32x4_extend_high_i16x8_u: { - SIMD_SINGLE_OP(simde_wasm_i32x4_extend_high_i16x8); + SIMD_SINGLE_OP(simde_wasm_u32x4_extend_high_u16x8); break; } case SIMD_i32x4_shl: @@ -7020,7 +7010,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_shr_u: { - SIMD_LANE_SHIFT(simde_wasm_i32x4_shr); + SIMD_LANE_SHIFT(simde_wasm_u32x4_shr); break; } case SIMD_i32x4_add: @@ -7045,7 +7035,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_min_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_min); + SIMD_DOUBLE_OP(simde_wasm_u32x4_min); break; } case SIMD_i32x4_max_s: @@ -7055,7 +7045,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_max_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_max); + SIMD_DOUBLE_OP(simde_wasm_u32x4_max); break; } case SIMD_i32x4_dot_i16x8_s: @@ -7075,12 +7065,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_extmul_low_i16x8_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_extmul_low_i16x8); + SIMD_DOUBLE_OP(simde_wasm_u32x4_extmul_low_u16x8); break; } case SIMD_i32x4_extmul_high_i16x8_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_extmul_high_i16x8); + SIMD_DOUBLE_OP(simde_wasm_u32x4_extmul_high_u16x8); break; } @@ -7129,12 +7119,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i64x2_extend_low_i32x4_u: { - SIMD_SINGLE_OP(simde_wasm_i64x2_extend_low_i32x4); + SIMD_SINGLE_OP(simde_wasm_u64x2_extend_low_u32x4); break; } case SIMD_i64x2_extend_high_i32x4_u: { - SIMD_SINGLE_OP(simde_wasm_i64x2_extend_high_i32x4); + SIMD_SINGLE_OP(simde_wasm_u64x2_extend_high_u32x4); break; } @@ -7151,7 +7141,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i64x2_shr_u: { - SIMD_LANE_SHIFT(simde_wasm_i64x2_shr); + SIMD_LANE_SHIFT(simde_wasm_u64x2_shr); break; } case SIMD_i64x2_add: @@ -7211,12 +7201,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i64x2_extmul_low_i32x4_u: { - SIMD_DOUBLE_OP(simde_wasm_i64x2_extmul_low_i32x4); + SIMD_DOUBLE_OP(simde_wasm_u64x2_extmul_low_u32x4); break; } case SIMD_i64x2_extmul_high_i32x4_u: { - SIMD_DOUBLE_OP(simde_wasm_i64x2_extmul_high_i32x4); + SIMD_DOUBLE_OP(simde_wasm_u64x2_extmul_high_u32x4); break; } @@ -7342,7 +7332,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_trunc_sat_f32x4_u: { - SIMD_SINGLE_OP(simde_wasm_i32x4_trunc_sat_f32x4); + SIMD_SINGLE_OP(simde_wasm_u32x4_trunc_sat_f32x4); break; } case SIMD_f32x4_convert_i32x4_s: @@ -7352,7 +7342,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_f32x4_convert_i32x4_u: { - SIMD_SINGLE_OP(simde_wasm_f32x4_convert_i32x4); + SIMD_SINGLE_OP(simde_wasm_f32x4_convert_u32x4); break; } case SIMD_i32x4_trunc_sat_f64x2_s_zero: @@ -7362,7 +7352,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_trunc_sat_f64x2_u_zero: { - SIMD_SINGLE_OP(simde_wasm_i32x4_trunc_sat_f64x2_zero); + SIMD_SINGLE_OP(simde_wasm_u32x4_trunc_sat_f64x2_zero); break; } case SIMD_f64x2_convert_low_i32x4_s: @@ -7372,7 +7362,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_f64x2_convert_low_i32x4_u: { - SIMD_SINGLE_OP(simde_wasm_f64x2_convert_low_i32x4); + SIMD_SINGLE_OP(simde_wasm_f64x2_convert_low_u32x4); break; } diff --git a/core/iwasm/interpreter/wasm_loader.c b/core/iwasm/interpreter/wasm_loader.c index d488e6eb5..eaba5555b 100644 --- a/core/iwasm/interpreter/wasm_loader.c +++ b/core/iwasm/interpreter/wasm_loader.c @@ -15484,10 +15484,6 @@ re_scan: read_leb_mem_offset(p, p_end, mem_offset); /* offset */ -#if WASM_ENABLE_FAST_INTERP != 0 - emit_uint32(loader_ctx, mem_offset); -#endif - CHECK_BUF(p, p_end, 1); lane = read_uint8(p); if (!check_simd_access_lane(opcode1, lane, error_buf,