From 8ce74b75bb577b2a0f835734aebcd36d0760b259 Mon Sep 17 00:00:00 2001 From: Maks Litskevich Date: Sat, 1 Feb 2025 04:14:35 +0000 Subject: [PATCH 1/2] Fix load/store (#4054) Fix v128 load/store --- core/iwasm/interpreter/wasm_interp_fast.c | 22 +++++++--------------- core/iwasm/interpreter/wasm_loader.c | 4 ---- 2 files changed, 7 insertions(+), 19 deletions(-) diff --git a/core/iwasm/interpreter/wasm_interp_fast.c b/core/iwasm/interpreter/wasm_interp_fast.c index f66a4d698..298d39668 100644 --- a/core/iwasm/interpreter/wasm_interp_fast.c +++ b/core/iwasm/interpreter/wasm_interp_fast.c @@ -5766,10 +5766,8 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, case SIMD_v128_load: { uint32 offset, addr; - offset = read_uint32( - frame_ip); // TODO: Check with an offset! - addr = GET_OPERAND(uint32, I32, 0); - frame_ip += 2; + offset = read_uint32(frame_ip); + addr = POP_I32(); addr_ret = GET_OFFSET(); CHECK_MEMORY_OVERFLOW(16); PUT_V128_TO_ADDR(frame_lp + addr_ret, LOAD_V128(maddr)); @@ -5879,8 +5877,8 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, { uint32 offset, addr; offset = read_uint32(frame_ip); - frame_ip += 2; - addr = GET_OPERAND(uint32, I32, 0); + V128 data = POP_V128(); + addr = POP_I32(); V128 data; data = POP_V128(); @@ -6393,7 +6391,6 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, #define SIMD_LOAD_LANE_COMMON(vec, register, lane, width) \ do { \ - addr = GET_OPERAND(uint32, I32, 0); \ addr_ret = GET_OFFSET(); \ CHECK_MEMORY_OVERFLOW(width / 8); \ if (width == 64) { \ @@ -6410,8 +6407,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, uint32 offset, addr; \ offset = read_uint32(frame_ip); \ V128 vec = POP_V128(); \ - int32 base = POP_I32(); \ - offset += base; \ + addr = POP_I32(); \ int lane = *frame_ip++; \ SIMD_LOAD_LANE_COMMON(vec, register, lane, width); \ } while (0) @@ -6441,11 +6437,8 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, uint32 offset, addr; \ offset = read_uint32(frame_ip); \ V128 vec = POP_V128(); \ - int32 base = POP_I32(); \ - offset += base; \ + addr = POP_I32(); \ int lane = *frame_ip++; \ - addr = GET_OPERAND(uint32, I32, 0); \ - addr_ret = GET_OFFSET(); \ CHECK_MEMORY_OVERFLOW(width / 8); \ if (width == 64) { \ STORE_I64(maddr, vec.register[lane]); \ @@ -6482,8 +6475,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, do { \ uint32 offset, addr; \ offset = read_uint32(frame_ip); \ - int32 base = POP_I32(); \ - offset += base; \ + addr = POP_I32(); \ int32 lane = 0; \ V128 vec = { 0 }; \ SIMD_LOAD_LANE_COMMON(vec, register, lane, width); \ diff --git a/core/iwasm/interpreter/wasm_loader.c b/core/iwasm/interpreter/wasm_loader.c index 10a5573a7..a39dff89d 100644 --- a/core/iwasm/interpreter/wasm_loader.c +++ b/core/iwasm/interpreter/wasm_loader.c @@ -15362,10 +15362,6 @@ re_scan: read_leb_mem_offset(p, p_end, mem_offset); /* offset */ -#if WASM_ENABLE_FAST_INTERP != 0 - emit_uint32(loader_ctx, mem_offset); -#endif - CHECK_BUF(p, p_end, 1); lane = read_uint8(p); if (!check_simd_access_lane(opcode1, lane, error_buf, From 50faad05019aa59526ca2d1455cfb93ef6c6607c Mon Sep 17 00:00:00 2001 From: Maks Litskevich Date: Sat, 1 Feb 2025 04:15:51 +0000 Subject: [PATCH 2/2] Correctly use unsigned functions (#4055) - Correctly select unsigned functions --------- Co-authored-by: James Marsh Co-authored-by: Ubuntu --- core/iwasm/interpreter/wasm_interp_fast.c | 104 +++++++++++----------- 1 file changed, 52 insertions(+), 52 deletions(-) diff --git a/core/iwasm/interpreter/wasm_interp_fast.c b/core/iwasm/interpreter/wasm_interp_fast.c index 298d39668..cd9dd91eb 100644 --- a/core/iwasm/interpreter/wasm_interp_fast.c +++ b/core/iwasm/interpreter/wasm_interp_fast.c @@ -6110,7 +6110,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_lt_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_lt); + SIMD_DOUBLE_OP(simde_wasm_u8x16_lt); break; } case SIMD_i8x16_gt_s: @@ -6120,7 +6120,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_gt_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_gt); + SIMD_DOUBLE_OP(simde_wasm_u8x16_gt); break; } case SIMD_i8x16_le_s: @@ -6130,7 +6130,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_le_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_le); + SIMD_DOUBLE_OP(simde_wasm_u8x16_le); break; } case SIMD_i8x16_ge_s: @@ -6140,7 +6140,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_ge_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_ge); + SIMD_DOUBLE_OP(simde_wasm_u8x16_ge); break; } @@ -6162,7 +6162,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_lt_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_lt); + SIMD_DOUBLE_OP(simde_wasm_u16x8_lt); break; } case SIMD_i16x8_gt_s: @@ -6172,7 +6172,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_gt_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_gt); + SIMD_DOUBLE_OP(simde_wasm_u16x8_gt); break; } case SIMD_i16x8_le_s: @@ -6182,7 +6182,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_le_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_le); + SIMD_DOUBLE_OP(simde_wasm_u16x8_le); break; } case SIMD_i16x8_ge_s: @@ -6192,7 +6192,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_ge_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_ge); + SIMD_DOUBLE_OP(simde_wasm_u16x8_ge); break; } @@ -6214,7 +6214,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_lt_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_lt); + SIMD_DOUBLE_OP(simde_wasm_u32x4_lt); break; } case SIMD_i32x4_gt_s: @@ -6224,7 +6224,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_gt_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_gt); + SIMD_DOUBLE_OP(simde_wasm_u32x4_gt); break; } case SIMD_i32x4_le_s: @@ -6234,7 +6234,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_le_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_le); + SIMD_DOUBLE_OP(simde_wasm_u32x4_le); break; } case SIMD_i32x4_ge_s: @@ -6244,7 +6244,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_ge_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_ge); + SIMD_DOUBLE_OP(simde_wasm_u32x4_ge); break; } @@ -6283,32 +6283,32 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, /* f64x2 comparison operations */ case SIMD_f64x2_eq: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_eq); + SIMD_DOUBLE_OP(simde_wasm_f64x2_eq); break; } case SIMD_f64x2_ne: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_ne); + SIMD_DOUBLE_OP(simde_wasm_f64x2_ne); break; } case SIMD_f64x2_lt: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_lt); + SIMD_DOUBLE_OP(simde_wasm_f64x2_lt); break; } case SIMD_f64x2_gt: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_gt); + SIMD_DOUBLE_OP(simde_wasm_f64x2_gt); break; } case SIMD_f64x2_le: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_le); + SIMD_DOUBLE_OP(simde_wasm_f64x2_le); break; } case SIMD_f64x2_ge: { - SIMD_DOUBLE_OP(simde_wasm_f32x4_ge); + SIMD_DOUBLE_OP(simde_wasm_f64x2_ge); break; } @@ -6563,7 +6563,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_narrow_i16x8_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_narrow_i16x8); + SIMD_DOUBLE_OP(simde_wasm_u8x16_narrow_i16x8); break; } case SIMD_f32x4_ceil: @@ -6613,7 +6613,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_shr_u: { - SIMD_LANE_SHIFT(simde_wasm_i8x16_shr); + SIMD_LANE_SHIFT(simde_wasm_u8x16_shr); break; } case SIMD_i8x16_add: @@ -6628,7 +6628,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_add_sat_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_add_sat); + SIMD_DOUBLE_OP(simde_wasm_u8x16_add_sat); break; } case SIMD_i8x16_sub: @@ -6643,7 +6643,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_sub_sat_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_sub_sat); + SIMD_DOUBLE_OP(simde_wasm_u8x16_sub_sat); break; } case SIMD_f64x2_ceil: @@ -6663,7 +6663,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_min_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_min); + SIMD_DOUBLE_OP(simde_wasm_u8x16_min); break; } case SIMD_i8x16_max_s: @@ -6673,7 +6673,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i8x16_max_u: { - SIMD_DOUBLE_OP(simde_wasm_i8x16_max); + SIMD_DOUBLE_OP(simde_wasm_u8x16_max); break; } case SIMD_f64x2_trunc: @@ -6693,7 +6693,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_extadd_pairwise_i8x16_u: { - SIMD_SINGLE_OP(simde_wasm_i16x8_extadd_pairwise_i8x16); + SIMD_SINGLE_OP(simde_wasm_u16x8_extadd_pairwise_u8x16); break; } case SIMD_i32x4_extadd_pairwise_i16x8_s: @@ -6703,7 +6703,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_extadd_pairwise_i16x8_u: { - SIMD_SINGLE_OP(simde_wasm_i32x4_extadd_pairwise_i16x8); + SIMD_SINGLE_OP(simde_wasm_u32x4_extadd_pairwise_u16x8); break; } @@ -6752,7 +6752,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_narrow_i32x4_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_narrow_i32x4); + SIMD_DOUBLE_OP(simde_wasm_u16x8_narrow_i32x4); break; } case SIMD_i16x8_extend_low_i8x16_s: @@ -6767,12 +6767,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_extend_low_i8x16_u: { - SIMD_SINGLE_OP(simde_wasm_i16x8_extend_low_i8x16); + SIMD_SINGLE_OP(simde_wasm_u16x8_extend_low_u8x16); break; } case SIMD_i16x8_extend_high_i8x16_u: { - SIMD_SINGLE_OP(simde_wasm_i16x8_extend_high_i8x16); + SIMD_SINGLE_OP(simde_wasm_u16x8_extend_high_u8x16); break; } case SIMD_i16x8_shl: @@ -6787,7 +6787,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_shr_u: { - SIMD_LANE_SHIFT(simde_wasm_i16x8_shr); + SIMD_LANE_SHIFT(simde_wasm_u16x8_shr); break; } case SIMD_i16x8_add: @@ -6802,7 +6802,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_add_sat_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_add_sat); + SIMD_DOUBLE_OP(simde_wasm_u16x8_add_sat); break; } case SIMD_i16x8_sub: @@ -6817,7 +6817,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_sub_sat_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_sub_sat); + SIMD_DOUBLE_OP(simde_wasm_u16x8_sub_sat); break; } case SIMD_f64x2_nearest: @@ -6837,7 +6837,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_min_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_min); + SIMD_DOUBLE_OP(simde_wasm_u16x8_min); break; } case SIMD_i16x8_max_s: @@ -6847,7 +6847,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_max_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_max); + SIMD_DOUBLE_OP(simde_wasm_u16x8_max); break; } case SIMD_i16x8_avgr_u: @@ -6867,12 +6867,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i16x8_extmul_low_i8x16_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_extmul_low_i8x16); + SIMD_DOUBLE_OP(simde_wasm_u16x8_extmul_low_u8x16); break; } case SIMD_i16x8_extmul_high_i8x16_u: { - SIMD_DOUBLE_OP(simde_wasm_i16x8_extmul_high_i8x16); + SIMD_DOUBLE_OP(simde_wasm_u16x8_extmul_high_u8x16); break; } @@ -6921,12 +6921,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_extend_low_i16x8_u: { - SIMD_SINGLE_OP(simde_wasm_i32x4_extend_low_i16x8); + SIMD_SINGLE_OP(simde_wasm_u32x4_extend_low_u16x8); break; } case SIMD_i32x4_extend_high_i16x8_u: { - SIMD_SINGLE_OP(simde_wasm_i32x4_extend_high_i16x8); + SIMD_SINGLE_OP(simde_wasm_u32x4_extend_high_u16x8); break; } case SIMD_i32x4_shl: @@ -6941,7 +6941,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_shr_u: { - SIMD_LANE_SHIFT(simde_wasm_i32x4_shr); + SIMD_LANE_SHIFT(simde_wasm_u32x4_shr); break; } case SIMD_i32x4_add: @@ -6966,7 +6966,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_min_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_min); + SIMD_DOUBLE_OP(simde_wasm_u32x4_min); break; } case SIMD_i32x4_max_s: @@ -6976,7 +6976,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_max_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_max); + SIMD_DOUBLE_OP(simde_wasm_u32x4_max); break; } case SIMD_i32x4_dot_i16x8_s: @@ -6996,12 +6996,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_extmul_low_i16x8_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_extmul_low_i16x8); + SIMD_DOUBLE_OP(simde_wasm_u32x4_extmul_low_u16x8); break; } case SIMD_i32x4_extmul_high_i16x8_u: { - SIMD_DOUBLE_OP(simde_wasm_i32x4_extmul_high_i16x8); + SIMD_DOUBLE_OP(simde_wasm_u32x4_extmul_high_u16x8); break; } @@ -7050,12 +7050,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i64x2_extend_low_i32x4_u: { - SIMD_SINGLE_OP(simde_wasm_i64x2_extend_low_i32x4); + SIMD_SINGLE_OP(simde_wasm_u64x2_extend_low_u32x4); break; } case SIMD_i64x2_extend_high_i32x4_u: { - SIMD_SINGLE_OP(simde_wasm_i64x2_extend_high_i32x4); + SIMD_SINGLE_OP(simde_wasm_u64x2_extend_high_u32x4); break; } @@ -7072,7 +7072,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i64x2_shr_u: { - SIMD_LANE_SHIFT(simde_wasm_i64x2_shr); + SIMD_LANE_SHIFT(simde_wasm_u64x2_shr); break; } case SIMD_i64x2_add: @@ -7132,12 +7132,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i64x2_extmul_low_i32x4_u: { - SIMD_DOUBLE_OP(simde_wasm_i64x2_extmul_low_i32x4); + SIMD_DOUBLE_OP(simde_wasm_u64x2_extmul_low_u32x4); break; } case SIMD_i64x2_extmul_high_i32x4_u: { - SIMD_DOUBLE_OP(simde_wasm_i64x2_extmul_high_i32x4); + SIMD_DOUBLE_OP(simde_wasm_u64x2_extmul_high_u32x4); break; } @@ -7263,7 +7263,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_trunc_sat_f32x4_u: { - SIMD_SINGLE_OP(simde_wasm_i32x4_trunc_sat_f32x4); + SIMD_SINGLE_OP(simde_wasm_u32x4_trunc_sat_f32x4); break; } case SIMD_f32x4_convert_i32x4_s: @@ -7273,7 +7273,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_f32x4_convert_i32x4_u: { - SIMD_SINGLE_OP(simde_wasm_f32x4_convert_i32x4); + SIMD_SINGLE_OP(simde_wasm_f32x4_convert_u32x4); break; } case SIMD_i32x4_trunc_sat_f64x2_s_zero: @@ -7283,7 +7283,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_i32x4_trunc_sat_f64x2_u_zero: { - SIMD_SINGLE_OP(simde_wasm_i32x4_trunc_sat_f64x2_zero); + SIMD_SINGLE_OP(simde_wasm_u32x4_trunc_sat_f64x2_zero); break; } case SIMD_f64x2_convert_low_i32x4_s: @@ -7293,7 +7293,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module, } case SIMD_f64x2_convert_low_i32x4_u: { - SIMD_SINGLE_OP(simde_wasm_f64x2_convert_low_i32x4); + SIMD_SINGLE_OP(simde_wasm_f64x2_convert_low_u32x4); break; }