mirror of
https://github.com/bytecodealliance/wasm-micro-runtime.git
synced 2025-07-15 08:48:33 +00:00
Clear compile warnings in codegen
This commit is contained in:
parent
001571a370
commit
2cc719e2fd
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@ -325,7 +325,6 @@ jmp_from_label_to_label(x86::Assembler &a, bh_list *jmp_info_list,
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* @param jmp_info_list the jmp info list
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* @param label_src the index of src label
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* @param op the opcode of condition operation
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* @param reg_no the no of register which contains the compare results
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* @param r1 the label info when condition is met
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* @param r2 the label info when condition is unmet, do nonthing if VOID
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* @param is_last_insn if current insn is the last insn of current block
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@ -335,7 +334,7 @@ jmp_from_label_to_label(x86::Assembler &a, bh_list *jmp_info_list,
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static bool
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cmp_r_and_jmp_label(JitCompContext *cc, x86::Assembler &a,
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bh_list *jmp_info_list, int32 label_src, COND_OP op,
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int32 reg_no, JitReg r1, JitReg r2, bool is_last_insn)
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JitReg r1, JitReg r2, bool is_last_insn)
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{
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Imm imm(INT32_MAX);
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JmpInfo *node;
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@ -819,7 +818,7 @@ ld_r_from_base_imm_offset_r(x86::Assembler &a, uint32 bytes_dst,
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uint32 kind_dst, bool is_signed, int32 reg_no_dst,
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int32 base, int32 reg_no_offset)
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{
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x86::Mem m(regs_i64[reg_no_dst], base, bytes_dst);
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x86::Mem m(regs_i64[reg_no_offset], base, bytes_dst);
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return mov_m_to_r(a, bytes_dst, kind_dst, is_signed, reg_no_dst, m);
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}
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@ -2149,7 +2148,11 @@ neg_r_to_r_i64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
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static bool
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neg_imm_to_r_f32(x86::Assembler &a, int32 reg_no, float data)
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{
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bh_assert(0);
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return false;
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(void)a;
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(void)reg_no;
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(void)data;
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}
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/**
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@ -2164,7 +2167,11 @@ neg_imm_to_r_f32(x86::Assembler &a, int32 reg_no, float data)
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static bool
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neg_r_to_r_f32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
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{
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bh_assert(0);
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return false;
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(void)a;
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(void)reg_no_dst;
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(void)reg_no_src;
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}
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/**
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@ -2179,7 +2186,11 @@ neg_r_to_r_f32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
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static bool
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neg_imm_to_r_f64(x86::Assembler &a, int32 reg_no, double data)
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{
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bh_assert(0);
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return false;
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(void)a;
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(void)reg_no;
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(void)data;
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}
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/**
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@ -2194,7 +2205,11 @@ neg_imm_to_r_f64(x86::Assembler &a, int32 reg_no, double data)
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static bool
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neg_r_to_r_f64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no_src)
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{
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bh_assert(0);
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return false;
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(void)a;
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(void)reg_no_dst;
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(void)reg_no_src;
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}
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static COND_OP
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@ -3727,6 +3742,11 @@ shift_imm_r_to_r_i32(x86::Assembler &a, SHIFT_OP op, int32 reg_no_dst,
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/* Should have been optimized by previous lower */
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bh_assert(0);
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return false;
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(void)a;
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(void)op;
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(void)reg_no_dst;
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(void)data1_src;
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(void)reg_no2_src;
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}
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/**
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@ -3919,6 +3939,11 @@ shift_imm_r_to_r_i64(x86::Assembler &a, SHIFT_OP op, int32 reg_no_dst,
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/* Should have been optimized by previous lower */
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bh_assert(0);
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return false;
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(void)a;
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(void)op;
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(void)reg_no_dst;
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(void)data1_src;
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(void)reg_no2_src;
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}
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/**
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@ -4056,6 +4081,7 @@ cmp_imm_imm_to_r_i32(x86::Assembler &a, int32 reg_no_dst, int32 data1_src,
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imm.setValue(data2_src);
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a.cmp(regs_i32[REG_I32_FREE_IDX], imm);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4077,6 +4103,7 @@ cmp_imm_r_to_r_i32(x86::Assembler &a, int32 reg_no_dst, int32 data1_src,
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a.mov(regs_i32[REG_I32_FREE_IDX], imm);
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a.cmp(regs_i32[REG_I32_FREE_IDX], regs_i32[reg_no2_src]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4097,6 +4124,7 @@ cmp_r_imm_to_r_i32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no1_src,
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Imm imm(data2_src);
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a.cmp(regs_i32[reg_no1_src], imm);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4116,6 +4144,7 @@ cmp_r_r_to_r_i32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no1_src,
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{
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a.cmp(regs_i32[reg_no1_src], regs_i32[reg_no2_src]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4138,6 +4167,7 @@ cmp_imm_imm_to_r_i64(x86::Assembler &a, int32 reg_no_dst, int32 data1_src,
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imm.setValue(data2_src);
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a.cmp(regs_i64[REG_I64_FREE_IDX], imm);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4159,6 +4189,7 @@ cmp_imm_r_to_r_i64(x86::Assembler &a, int32 reg_no_dst, int64 data1_src,
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a.mov(regs_i64[REG_I64_FREE_IDX], imm);
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a.cmp(regs_i64[REG_I64_FREE_IDX], regs_i64[reg_no2_src]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4187,6 +4218,7 @@ cmp_r_imm_to_r_i64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no1_src,
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a.cmp(regs_i64[reg_no1_src], regs_i64[REG_I64_FREE_IDX]);
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}
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4206,6 +4238,7 @@ cmp_r_r_to_r_i64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no1_src,
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{
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a.cmp(regs_i64[reg_no1_src], regs_i64[reg_no2_src]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4225,6 +4258,7 @@ cmp_r_r_to_r_f32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no1_src,
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{
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a.comiss(regs_float[reg_no1_src], regs_float[reg_no2_src]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4242,9 +4276,13 @@ static bool
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cmp_imm_imm_to_r_f32(x86::Assembler &a, int32 reg_no_dst, float data1_src,
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float data2_src)
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{
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/* should resolve it in frontend */
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/* should have been optimized in the frontend */
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bh_assert(0);
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return false;
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(void)a;
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(void)reg_no_dst;
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(void)data1_src;
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(void)data2_src;
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}
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/**
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@ -4265,6 +4303,7 @@ cmp_imm_r_to_r_f32(x86::Assembler &a, int32 reg_no_dst, float data1_src,
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mov_imm_to_r_f32(a, REG_F32_FREE_IDX, data1_src);
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a.comiss(regs_float[REG_F32_FREE_IDX], regs_float[reg_no2_src]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4285,6 +4324,7 @@ cmp_r_imm_to_r_f32(x86::Assembler &a, int32 reg_no_dst, int32 reg_no1_src,
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mov_imm_to_r_f32(a, REG_F32_FREE_IDX, data2_src);
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a.comiss(regs_float[reg_no1_src], regs_float[REG_F32_FREE_IDX]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4304,6 +4344,7 @@ cmp_r_r_to_r_f64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no1_src,
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{
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a.comisd(regs_float[reg_no1_src], regs_float[reg_no2_src]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4321,9 +4362,13 @@ static bool
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cmp_imm_imm_to_r_f64(x86::Assembler &a, int32 reg_no_dst, double data1_src,
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double data2_src)
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{
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/* should resolve it in frontend */
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/* should have been optimized in the frontend */
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bh_assert(0);
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return false;
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(void)a;
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(void)reg_no_dst;
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(void)data1_src;
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(void)data2_src;
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}
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/**
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@ -4344,6 +4389,7 @@ cmp_imm_r_to_r_f64(x86::Assembler &a, int32 reg_no_dst, double data1_src,
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mov_imm_to_r_f64(a, REG_F64_FREE_IDX, data1_src);
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a.comisd(regs_float[REG_F64_FREE_IDX], regs_float[reg_no2_src]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4364,6 +4410,7 @@ cmp_r_imm_to_r_f64(x86::Assembler &a, int32 reg_no_dst, int32 reg_no1_src,
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mov_imm_to_r_f64(a, REG_F64_FREE_IDX, data2_src);
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a.comisd(regs_float[reg_no1_src], regs_float[REG_F64_FREE_IDX]);
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return true;
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(void)reg_no_dst;
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}
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/**
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@ -4933,7 +4980,6 @@ bitcount_r_to_r_i64(x86::Assembler &a, BITCOUNT_OP op, int32 reg_no_dst,
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#define BITCOUNT_R_R(kind, Type, type, op) \
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do { \
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int32 reg_no_dst; \
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bool _ret = false; \
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\
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CHECK_EQKIND(r0, r1); \
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CHECK_NCONST(r1); \
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@ -5066,15 +5112,14 @@ fail:
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*
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* @param cc the compiler context
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* @param a the assembler to emit the code
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* @param reg_no the no of register which contains cmp flags of cmp result
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* @param op the condition opcode to jmp
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* @param offset the relative offset to jmp when the contidtion meeted
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*
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* @return return the next address of native code after encoded
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*/
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static bool
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cmp_r_and_jmp_relative(JitCompContext *cc, x86::Assembler &a, int32 reg_no,
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COND_OP op, int32 offset)
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cmp_r_and_jmp_relative(JitCompContext *cc, x86::Assembler &a, COND_OP op,
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int32 offset)
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{
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Imm target(INT32_MAX);
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char *stream = (char *)a.code()->sectionById(0)->buffer().data()
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@ -5219,8 +5264,7 @@ lower_select(JitCompContext *cc, x86::Assembler &a, COND_OP op, JitReg r0,
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}
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if (r3 && r0 != r3) {
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if (!cmp_r_and_jmp_relative(cc, a, jit_reg_no(r1), op,
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(int32)size_mov2))
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if (!cmp_r_and_jmp_relative(cc, a, op, (int32)size_mov2))
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return false;
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a.embedDataArray(TypeId::kInt8, stream_mov2, size_mov2);
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}
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@ -5269,7 +5313,7 @@ lower_branch(JitCompContext *cc, x86::Assembler &a, bh_list *jmp_info_list,
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int32 label_src, COND_OP op, JitReg r0, JitReg r1, JitReg r2,
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bool is_last_insn)
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{
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int32 reg_no, label_dst;
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int32 label_dst;
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CHECK_NCONST(r0);
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CHECK_KIND(r0, JIT_REG_KIND_I32);
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@ -5287,9 +5331,8 @@ lower_branch(JitCompContext *cc, x86::Assembler &a, bh_list *jmp_info_list,
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op = not_cond(op);
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}
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reg_no = jit_reg_no(r0);
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if (!cmp_r_and_jmp_label(cc, a, jmp_info_list, label_src, op, reg_no, r1,
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r2, is_last_insn))
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if (!cmp_r_and_jmp_label(cc, a, jmp_info_list, label_src, op, r1, r2,
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is_last_insn))
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GOTO_FAIL;
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return true;
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@ -5444,15 +5487,12 @@ fail:
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*
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* @param cc the compiler context
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* @param a the assembler to emit the code
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* @param jmp_info_list the jmp info list
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* @param label_src the index of src label
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* @param insn current insn info
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*
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* @return true if success, false if failed
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*/
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static bool
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lower_callnative(JitCompContext *cc, x86::Assembler &a, bh_list *jmp_info_list,
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int32 label_src, JitInsn *insn)
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lower_callnative(JitCompContext *cc, x86::Assembler &a, JitInsn *insn)
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{
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void (*func_ptr)(void);
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JitReg ret_reg, func_reg, arg_reg;
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@ -5460,10 +5500,7 @@ lower_callnative(JitCompContext *cc, x86::Assembler &a, bh_list *jmp_info_list,
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uint8 regs_arg_idx[] = { REG_RDI_IDX, REG_RSI_IDX, REG_RDX_IDX,
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REG_RCX_IDX, REG_R8_IDX, REG_R9_IDX };
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Imm imm;
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JmpInfo *node;
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uint32 i, opnd_num;
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int32 i32;
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int64 i64;
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uint8 integer_reg_index = 0;
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uint8 floatpoint_reg_index = 0;
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@ -5548,9 +5585,9 @@ lower_callnative(JitCompContext *cc, x86::Assembler &a, bh_list *jmp_info_list,
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&& jit_reg_no(ret_reg) == REG_EAX_IDX)
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|| (jit_reg_kind(ret_reg) == JIT_REG_KIND_I64
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&& jit_reg_no(ret_reg) == REG_RAX_IDX)
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|| (jit_reg_kind(ret_reg) == JIT_REG_KIND_F32
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|| jit_reg_kind(ret_reg) == JIT_REG_KIND_F64
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&& jit_reg_no(ret_reg) == 0));
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|| ((jit_reg_kind(ret_reg) == JIT_REG_KIND_F32
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|| jit_reg_kind(ret_reg) == JIT_REG_KIND_F64)
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&& jit_reg_no(ret_reg) == 0));
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}
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return true;
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@ -5603,8 +5640,7 @@ fail:
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}
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static bool
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lower_returnbc(JitCompContext *cc, x86::Assembler &a, int32 label_src,
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JitInsn *insn)
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lower_returnbc(JitCompContext *cc, x86::Assembler &a, JitInsn *insn)
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{
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JitReg ecx_hreg = jit_reg_new(JIT_REG_KIND_I32, REG_ECX_IDX);
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JitReg rcx_hreg = jit_reg_new(JIT_REG_KIND_I64, REG_RCX_IDX);
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@ -5687,7 +5723,7 @@ static void
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patch_jmp_info_list(JitCompContext *cc, bh_list *jmp_info_list)
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{
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JmpInfo *jmp_info, *jmp_info_next;
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JitReg reg_src, reg_dst;
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JitReg reg_dst;
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char *stream;
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jmp_info = (JmpInfo *)bh_list_first_elem(jmp_info_list);
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@ -5695,7 +5731,6 @@ patch_jmp_info_list(JitCompContext *cc, bh_list *jmp_info_list)
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while (jmp_info) {
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jmp_info_next = (JmpInfo *)bh_list_elem_next(jmp_info);
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reg_src = jit_reg_new(JIT_REG_KIND_L32, jmp_info->label_src);
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stream = (char *)cc->jitted_addr_begin + jmp_info->offset;
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if (jmp_info->type == JMP_DST_LABEL) {
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@ -5893,7 +5928,7 @@ jit_codegen_gen_native(JitCompContext *cc)
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JitReg r0, r1, r2, r3;
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JmpInfo jmp_info_head;
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bh_list *jmp_info_list = (bh_list *)&jmp_info_head;
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uint32 label_index, label_num, i, j;
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uint32 label_index, label_num, i;
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uint32 *label_offsets = NULL, code_size;
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#if CODEGEN_DUMP != 0
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uint32 code_offset = 0;
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|
@ -6324,8 +6359,7 @@ jit_codegen_gen_native(JitCompContext *cc)
|
|||
}
|
||||
|
||||
case JIT_OP_CALLNATIVE:
|
||||
if (!lower_callnative(cc, a, jmp_info_list, label_index,
|
||||
insn))
|
||||
if (!lower_callnative(cc, a, insn))
|
||||
GOTO_FAIL;
|
||||
break;
|
||||
|
||||
|
@ -6335,7 +6369,7 @@ jit_codegen_gen_native(JitCompContext *cc)
|
|||
break;
|
||||
|
||||
case JIT_OP_RETURNBC:
|
||||
if (!lower_returnbc(cc, a, label_index, insn))
|
||||
if (!lower_returnbc(cc, a, insn))
|
||||
GOTO_FAIL;
|
||||
break;
|
||||
|
||||
|
@ -6424,12 +6458,15 @@ fail:
|
|||
bool
|
||||
jit_codegen_lower(JitCompContext *cc)
|
||||
{
|
||||
(void)cc;
|
||||
return true;
|
||||
}
|
||||
|
||||
void
|
||||
jit_codegen_free_native(JitCompContext *cc)
|
||||
{}
|
||||
{
|
||||
(void)cc;
|
||||
}
|
||||
|
||||
void
|
||||
jit_codegen_dump_native(void *begin_addr, void *end_addr)
|
||||
|
|
Loading…
Reference in New Issue
Block a user