mirror of
https://github.com/bytecodealliance/wasm-micro-runtime.git
synced 2025-10-31 05:11:19 +00:00
Add more reloc symbols for target arm/thumb/riscv (#834)
Add more reloc symbols for target arm/thumb/riscv and implement relocation type R_ARM_ABS32 for thumb. Tested in buildroot qemu.
This commit is contained in:
Wenyong Huang
GitHub
parent
64be6ec9a7
commit
37a14c9825
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@ -10,105 +10,166 @@
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#define R_ARM_ABS32 2 /* Direct 32 bit */
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/* clang-format off */
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void __divdi3();
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void __udivdi3();
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void __moddi3();
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void __umoddi3();
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void __divsi3();
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void __udivsi3();
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void __modsi3();
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void __umodsi3();
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void __udivmoddi4();
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void __clzsi2();
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void __fixsfdi();
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void __fixunssfdi();
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void __fixdfdi();
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void __fixunsdfdi();
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void __floatdisf();
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void __floatundisf();
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void __floatdidf();
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void __floatundidf();
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void __aeabi_l2f();
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void __aeabi_f2lz();
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void __aeabi_ul2f();
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void __adddf3();
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void __addsf3();
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void __aeabi_d2iz();
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void __aeabi_d2lz();
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void __aeabi_l2d();
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void __aeabi_f2ulz();
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void __aeabi_ul2d();
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void __aeabi_d2ulz();
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void __aeabi_idiv();
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void __aeabi_uidiv();
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void __aeabi_idivmod();
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void __aeabi_uidivmod();
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void __aeabi_ldivmod();
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void __aeabi_uldivmod();
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void __aeabi_i2d();
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void __aeabi_dadd();
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void __aeabi_ddiv();
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void __aeabi_dcmpge();
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void __aeabi_dcmple();
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void __aeabi_dcmplt();
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void __aeabi_dcmpun();
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void __aeabi_dcmple();
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void __aeabi_dcmpge();
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void __aeabi_d2iz();
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void __aeabi_ddiv();
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void __aeabi_f2d();
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void __aeabi_f2iz();
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void __aeabi_f2lz();
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void __aeabi_f2ulz();
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void __aeabi_fcmpge();
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void __aeabi_fcmple();
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void __aeabi_fcmplt();
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void __aeabi_fcmpun();
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void __aeabi_fcmple();
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void __aeabi_fcmpge();
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void __aeabi_f2iz();
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void __aeabi_f2d();
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void __aeabi_i2d();
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void __aeabi_idiv();
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void __aeabi_idivmod();
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void __aeabi_l2d();
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void __aeabi_l2f();
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void __aeabi_ldivmod();
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void __aeabi_uidiv();
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void __aeabi_uidivmod();
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void __aeabi_ul2d();
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void __aeabi_ul2f();
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void __aeabi_uldivmod();
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void __clzsi2();
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void __divdf3();
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void __divdi3();
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void __divsf3();
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void __divsi3();
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void __eqdf2();
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void __extendsfdf2();
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void __fixdfdi();
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void __fixdfsi();
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void __fixsfdi();
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void __fixsfsi();
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void __fixunsdfdi();
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void __fixunsdfsi();
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void __fixunssfdi();
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void __floatdidf();
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void __floatdisf();
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void __floatsidf();
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void __floatsisf();
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void __floatundidf();
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void __floatundisf();
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void __floatunsidf();
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void __floatunsisf();
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void __gedf2();
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void __gesf2();
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void __gtdf2();
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void __gtsf2();
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void __ledf2();
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void __lesf2();
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void __ltdf2();
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void __ltsf2();
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void __moddi3();
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void __modsi3();
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void __muldf3();
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void __mulsf3();
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void __nedf2();
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void __nesf2();
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void __subdf3();
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void __subsf3();
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void __truncdfsf2();
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void __udivdi3();
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void __udivmoddi4();
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void __udivsi3();
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void __umoddi3();
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void __umodsi3();
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void __unorddf2();
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void __unordsf2();
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/* clang-format on */
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static SymbolMap target_sym_map[] = {
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/* clang-format off */
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REG_COMMON_SYMBOLS
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/* compiler-rt symbols that come from compiler(e.g. gcc) */
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REG_SYM(__divdi3),
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REG_SYM(__adddf3),
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REG_SYM(__addsf3),
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/* clang-format on */
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REG_SYM(__udivdi3),
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REG_SYM(__moddi3),
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REG_SYM(__umoddi3),
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REG_SYM(__divsi3),
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REG_SYM(__udivsi3),
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REG_SYM(__modsi3),
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REG_SYM(__umodsi3),
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REG_SYM(__udivmoddi4),
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REG_SYM(__clzsi2),
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REG_SYM(__fixsfdi),
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REG_SYM(__fixunssfdi),
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REG_SYM(__fixdfdi),
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REG_SYM(__fixunsdfdi),
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REG_SYM(__floatdisf),
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REG_SYM(__floatundisf),
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REG_SYM(__floatdidf),
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REG_SYM(__floatundidf),
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REG_SYM(__aeabi_l2f),
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REG_SYM(__aeabi_f2lz),
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REG_SYM(__aeabi_ul2f),
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REG_SYM(__aeabi_d2iz),
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REG_SYM(__aeabi_d2lz),
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REG_SYM(__aeabi_l2d),
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REG_SYM(__aeabi_f2ulz),
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REG_SYM(__aeabi_ul2d),
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REG_SYM(__aeabi_d2ulz),
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REG_SYM(__aeabi_idiv),
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REG_SYM(__aeabi_uidiv),
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REG_SYM(__aeabi_idivmod),
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REG_SYM(__aeabi_uidivmod),
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REG_SYM(__aeabi_ldivmod),
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REG_SYM(__aeabi_uldivmod),
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REG_SYM(__aeabi_i2d),
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REG_SYM(__aeabi_dadd),
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REG_SYM(__aeabi_ddiv),
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REG_SYM(__aeabi_dcmpge),
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REG_SYM(__aeabi_dcmple),
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REG_SYM(__aeabi_dcmplt),
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REG_SYM(__aeabi_dcmpun),
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REG_SYM(__aeabi_dcmple),
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REG_SYM(__aeabi_dcmpge),
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REG_SYM(__aeabi_d2iz),
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REG_SYM(__aeabi_ddiv),
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REG_SYM(__aeabi_f2d),
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REG_SYM(__aeabi_f2iz),
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REG_SYM(__aeabi_f2lz),
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REG_SYM(__aeabi_f2ulz),
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REG_SYM(__aeabi_fcmpge),
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REG_SYM(__aeabi_fcmple),
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REG_SYM(__aeabi_fcmplt),
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REG_SYM(__aeabi_fcmpun),
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REG_SYM(__aeabi_fcmple),
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REG_SYM(__aeabi_fcmpge),
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REG_SYM(__aeabi_f2iz),
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REG_SYM(__aeabi_f2d),
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REG_SYM(__aeabi_i2d),
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REG_SYM(__aeabi_idiv),
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REG_SYM(__aeabi_idivmod),
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REG_SYM(__aeabi_l2d),
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REG_SYM(__aeabi_l2f),
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REG_SYM(__aeabi_ldivmod),
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REG_SYM(__aeabi_uidiv),
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REG_SYM(__aeabi_uidivmod),
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REG_SYM(__aeabi_ul2d),
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REG_SYM(__aeabi_ul2f),
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REG_SYM(__aeabi_uldivmod),
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REG_SYM(__clzsi2),
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REG_SYM(__divdf3),
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REG_SYM(__divdi3),
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REG_SYM(__divsf3),
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REG_SYM(__divsi3),
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REG_SYM(__eqdf2),
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REG_SYM(__extendsfdf2),
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REG_SYM(__fixdfdi),
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REG_SYM(__fixdfsi),
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REG_SYM(__fixsfdi),
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REG_SYM(__fixsfsi),
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REG_SYM(__fixunsdfdi),
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REG_SYM(__fixunsdfsi),
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REG_SYM(__fixunssfdi),
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REG_SYM(__floatdidf),
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REG_SYM(__floatdisf),
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REG_SYM(__floatsidf),
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REG_SYM(__floatsisf),
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REG_SYM(__floatundidf),
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REG_SYM(__floatundisf),
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REG_SYM(__floatunsidf),
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REG_SYM(__floatunsisf),
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REG_SYM(__gedf2),
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REG_SYM(__gesf2),
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REG_SYM(__gtdf2),
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REG_SYM(__gtsf2),
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REG_SYM(__ledf2),
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REG_SYM(__lesf2),
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REG_SYM(__ltdf2),
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REG_SYM(__ltsf2),
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REG_SYM(__moddi3),
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REG_SYM(__modsi3),
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REG_SYM(__muldf3),
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REG_SYM(__muldf3),
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REG_SYM(__mulsf3),
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REG_SYM(__nedf2),
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REG_SYM(__nesf2),
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REG_SYM(__subdf3),
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REG_SYM(__subsf3),
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REG_SYM(__truncdfsf2),
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REG_SYM(__udivdi3),
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REG_SYM(__udivmoddi4),
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REG_SYM(__udivsi3),
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REG_SYM(__umoddi3),
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REG_SYM(__umodsi3),
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REG_SYM(__unorddf2),
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REG_SYM(__unordsf2),
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};
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static void
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@ -17,21 +17,53 @@
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/* clang-format off */
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void __divdi3();
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void __divsi3();
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void __fixdfdi();
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void __fixsfdi();
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void __fixunsdfdi();
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void __fixunssfdi();
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void __floatdidf();
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void __floatdisf();
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void __floatundidf();
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void __floatundisf();
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void __moddi3();
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void __modsi3();
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void __muldi3();
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void __mulsi3();
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void __udivdi3();
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void __udivsi3();
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void __umoddi3();
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void __umodsi3();
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/* clang-format on */
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static SymbolMap target_sym_map[] = {
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/* clang-format off */
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REG_COMMON_SYMBOLS
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REG_SYM(__divdi3),
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/* clang-format on */
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REG_SYM(__divsi3),
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#if __riscv_xlen == 32
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REG_SYM(__fixdfdi),
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REG_SYM(__fixsfdi),
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#endif
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REG_SYM(__fixunsdfdi),
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REG_SYM(__fixunssfdi),
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#if __riscv_xlen == 32
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REG_SYM(__floatdidf),
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REG_SYM(__floatdisf),
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REG_SYM(__floatundidf),
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REG_SYM(__floatundisf),
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#endif
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REG_SYM(__moddi3),
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REG_SYM(__modsi3),
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REG_SYM(__muldi3),
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#if __riscv_xlen == 32
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REG_SYM(__mulsi3),
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#endif
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REG_SYM(__udivdi3),
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REG_SYM(__udivsi3),
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REG_SYM(__umoddi3),
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REG_SYM(__umodsi3),
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/* clang-format on */
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};
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static void
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@ -5,138 +5,180 @@
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#include "aot_reloc.h"
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#define R_ARM_ABS32 2 /* Direct 32 bit */
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#define R_ARM_THM_CALL 10 /* PC relative (Thumb BL and ARMv5 Thumb BLX). */
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#define R_ARM_THM_JMP24 30 /* B.W */
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/* clang-format off */
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void __ltdf2();
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void __adddf3();
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void __eqdf2();
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void __unorddf2();
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void __muldf3();
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void __subdf3();
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void __gedf2();
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void __ledf2();
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void __fixunsdfsi();
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void __floatunsidf();
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void __fixdfsi();
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void __nedf2();
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void __floatsidf();
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void __divdi3();
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void __udivdi3();
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void __moddi3();
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void __umoddi3();
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void __divsi3();
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void __udivsi3();
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void __modsi3();
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void __udivmoddi4();
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void __clzsi2();
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void __fixsfdi();
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void __fixunssfdi();
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void __fixdfdi();
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void __fixunsdfdi();
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void __floatdisf();
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void __floatundisf();
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void __floatdidf();
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void __floatundidf();
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void __aeabi_l2f();
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void __aeabi_f2lz();
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void __aeabi_ul2f();
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void __addsf3();
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void __aeabi_d2iz();
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void __aeabi_d2lz();
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void __aeabi_l2d();
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void __aeabi_f2ulz();
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void __aeabi_ul2d();
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void __aeabi_ui2d();
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void __aeabi_d2uiz();
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void __aeabi_d2ulz();
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void __aeabi_idiv();
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void __aeabi_uidiv();
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void __aeabi_idivmod();
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void __aeabi_uidivmod();
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void __aeabi_ldivmod();
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void __aeabi_uldivmod();
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void __aeabi_i2d();
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void __aeabi_dadd();
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void __aeabi_ddiv();
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void __aeabi_dcmplt();
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void __aeabi_dcmpun();
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void __aeabi_dcmple();
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void __aeabi_dcmpge();
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void __aeabi_dcmpgt();
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void __aeabi_d2iz();
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void __aeabi_d2uiz();
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void __aeabi_dcmple();
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void __aeabi_dcmplt();
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void __aeabi_dcmpun();
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void __aeabi_ddiv();
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void __aeabi_f2d();
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void __aeabi_f2iz();
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void __aeabi_f2lz();
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void __aeabi_f2ulz();
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void __aeabi_fcmpge();
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void __aeabi_fcmple();
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void __aeabi_fcmplt();
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void __aeabi_fcmpun();
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void __aeabi_fcmple();
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void __aeabi_fcmpge();
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void __aeabi_f2iz();
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void __aeabi_f2d();
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void __aeabi_i2d();
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void __aeabi_idiv();
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void __aeabi_idivmod();
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void __aeabi_l2d();
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void __aeabi_l2f();
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void __aeabi_ldivmod();
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void __aeabi_ui2d();
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void __aeabi_uidiv();
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void __aeabi_uidivmod();
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void __aeabi_ul2d();
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void __aeabi_ul2f();
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void __aeabi_uldivmod();
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void __ashldi3();
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void __clzsi2();
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void __divdf3();
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void __divdi3();
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void __divsi3();
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void __eqdf2();
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void __eqsf2();
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void __extendsfdf2();
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void __fixdfdi();
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void __fixdfsi();
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void __fixsfdi();
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void __fixunsdfdi();
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void __fixunsdfsi();
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void __fixunssfdi();
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void __floatdidf();
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void __floatdisf();
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void __floatsidf();
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void __floatsisf();
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void __floatundidf();
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void __floatundisf();
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void __floatunsidf();
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void __floatunsisf();
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void __gedf2();
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void __gesf2();
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void __gtdf2();
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void __gtsf2();
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void __ledf2();
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void __lesf2();
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void __lshrdi3();
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void __ltdf2();
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void __ltsf2();
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void __moddi3();
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void __modsi3();
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void __muldf3();
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void __muldi3();
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void __mulsf3();
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void __nedf2();
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void __nesf2();
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void __subdf3();
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void __subsf3();
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void __truncdfsf2();
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void __udivdi3();
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void __udivmoddi4();
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void __udivsi3();
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void __umoddi3();
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void __umodsi3();
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void __unorddf2();
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void __unordsf2();
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/* clang-format on */
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static SymbolMap target_sym_map[] = {
|
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/* clang-format off */
|
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REG_COMMON_SYMBOLS
|
||||
/* compiler-rt symbols that come from compiler(e.g. gcc) */
|
||||
REG_SYM(__ltdf2),
|
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/* clang-format on */
|
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REG_SYM(__adddf3),
|
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REG_SYM(__eqdf2),
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REG_SYM(__unorddf2),
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REG_SYM(__muldf3),
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REG_SYM(__subdf3),
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REG_SYM(__gedf2),
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REG_SYM(__ledf2),
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REG_SYM(__fixunsdfsi),
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REG_SYM(__floatunsidf),
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REG_SYM(__fixdfsi),
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||||
REG_SYM(__nedf2),
|
||||
REG_SYM(__floatsidf),
|
||||
REG_SYM(__divdi3),
|
||||
REG_SYM(__udivdi3),
|
||||
REG_SYM(__umoddi3),
|
||||
REG_SYM(__divsi3),
|
||||
REG_SYM(__udivsi3),
|
||||
REG_SYM(__modsi3),
|
||||
REG_SYM(__udivmoddi4),
|
||||
REG_SYM(__clzsi2),
|
||||
REG_SYM(__fixsfdi),
|
||||
REG_SYM(__fixunssfdi),
|
||||
REG_SYM(__fixdfdi),
|
||||
REG_SYM(__fixunsdfdi),
|
||||
REG_SYM(__floatdisf),
|
||||
REG_SYM(__floatundisf),
|
||||
REG_SYM(__floatdidf),
|
||||
REG_SYM(__floatundidf),
|
||||
REG_SYM(__aeabi_l2f),
|
||||
REG_SYM(__aeabi_f2lz),
|
||||
REG_SYM(__aeabi_ul2f),
|
||||
REG_SYM(__addsf3),
|
||||
/* clang-format on */
|
||||
REG_SYM(__aeabi_d2iz),
|
||||
REG_SYM(__aeabi_d2lz),
|
||||
REG_SYM(__aeabi_l2d),
|
||||
REG_SYM(__aeabi_f2ulz),
|
||||
REG_SYM(__aeabi_ul2d),
|
||||
REG_SYM(__aeabi_ui2d),
|
||||
REG_SYM(__aeabi_d2uiz),
|
||||
REG_SYM(__aeabi_d2ulz),
|
||||
REG_SYM(__aeabi_idiv),
|
||||
REG_SYM(__aeabi_uidiv),
|
||||
REG_SYM(__aeabi_idivmod),
|
||||
REG_SYM(__aeabi_uidivmod),
|
||||
REG_SYM(__aeabi_ldivmod),
|
||||
REG_SYM(__aeabi_uldivmod),
|
||||
REG_SYM(__aeabi_i2d),
|
||||
REG_SYM(__aeabi_dadd),
|
||||
REG_SYM(__aeabi_ddiv),
|
||||
REG_SYM(__aeabi_dcmplt),
|
||||
REG_SYM(__aeabi_dcmpun),
|
||||
REG_SYM(__aeabi_dcmple),
|
||||
REG_SYM(__aeabi_dcmpge),
|
||||
REG_SYM(__aeabi_dcmpgt),
|
||||
REG_SYM(__aeabi_d2iz),
|
||||
REG_SYM(__aeabi_d2uiz),
|
||||
REG_SYM(__aeabi_dcmple),
|
||||
REG_SYM(__aeabi_dcmplt),
|
||||
REG_SYM(__aeabi_dcmpun),
|
||||
REG_SYM(__aeabi_ddiv),
|
||||
REG_SYM(__aeabi_f2d),
|
||||
REG_SYM(__aeabi_f2iz),
|
||||
REG_SYM(__aeabi_f2lz),
|
||||
REG_SYM(__aeabi_f2ulz),
|
||||
REG_SYM(__aeabi_fcmpge),
|
||||
REG_SYM(__aeabi_fcmple),
|
||||
REG_SYM(__aeabi_fcmplt),
|
||||
REG_SYM(__aeabi_fcmpun),
|
||||
REG_SYM(__aeabi_fcmple),
|
||||
REG_SYM(__aeabi_fcmpge),
|
||||
REG_SYM(__aeabi_f2iz),
|
||||
REG_SYM(__aeabi_f2d),
|
||||
REG_SYM(__aeabi_i2d),
|
||||
REG_SYM(__aeabi_idiv),
|
||||
REG_SYM(__aeabi_idivmod),
|
||||
REG_SYM(__aeabi_l2d),
|
||||
REG_SYM(__aeabi_l2f),
|
||||
REG_SYM(__aeabi_ldivmod),
|
||||
REG_SYM(__aeabi_ui2d),
|
||||
REG_SYM(__aeabi_uidiv),
|
||||
REG_SYM(__aeabi_uidivmod),
|
||||
REG_SYM(__aeabi_ul2d),
|
||||
REG_SYM(__aeabi_ul2f),
|
||||
REG_SYM(__aeabi_uldivmod),
|
||||
REG_SYM(__ashldi3),
|
||||
REG_SYM(__clzsi2),
|
||||
REG_SYM(__divdf3),
|
||||
REG_SYM(__divdi3),
|
||||
REG_SYM(__divsi3),
|
||||
REG_SYM(__eqdf2),
|
||||
REG_SYM(__eqsf2),
|
||||
REG_SYM(__extendsfdf2),
|
||||
REG_SYM(__fixdfdi),
|
||||
REG_SYM(__fixdfsi),
|
||||
REG_SYM(__fixsfdi),
|
||||
REG_SYM(__fixunsdfdi),
|
||||
REG_SYM(__fixunsdfsi),
|
||||
REG_SYM(__fixunssfdi),
|
||||
REG_SYM(__floatdidf),
|
||||
REG_SYM(__floatdisf),
|
||||
REG_SYM(__floatsidf),
|
||||
REG_SYM(__floatsisf),
|
||||
REG_SYM(__floatundidf),
|
||||
REG_SYM(__floatundisf),
|
||||
REG_SYM(__floatunsidf),
|
||||
REG_SYM(__floatunsisf),
|
||||
REG_SYM(__gedf2),
|
||||
REG_SYM(__gesf2),
|
||||
REG_SYM(__gtdf2),
|
||||
REG_SYM(__gtsf2),
|
||||
REG_SYM(__ledf2),
|
||||
REG_SYM(__lesf2),
|
||||
REG_SYM(__lshrdi3),
|
||||
REG_SYM(__ltdf2),
|
||||
REG_SYM(__ltsf2),
|
||||
REG_SYM(__moddi3),
|
||||
REG_SYM(__modsi3),
|
||||
REG_SYM(__muldf3),
|
||||
REG_SYM(__muldi3),
|
||||
REG_SYM(__mulsf3),
|
||||
REG_SYM(__nedf2),
|
||||
REG_SYM(__nesf2),
|
||||
REG_SYM(__subdf3),
|
||||
REG_SYM(__subsf3),
|
||||
REG_SYM(__truncdfsf2),
|
||||
REG_SYM(__udivdi3),
|
||||
REG_SYM(__udivmoddi4),
|
||||
REG_SYM(__udivsi3),
|
||||
REG_SYM(__umoddi3),
|
||||
REG_SYM(__umodsi3),
|
||||
REG_SYM(__unorddf2),
|
||||
REG_SYM(__unordsf2),
|
||||
};
|
||||
|
||||
static void
|
||||
|
|
@ -316,6 +358,18 @@ apply_relocation(AOTModule *module, uint8 *target_section_addr,
|
|||
*(reloc_addr + 1) = (*(reloc_addr + 1) & ~0x7FF) | initial_addend_1;
|
||||
break;
|
||||
}
|
||||
case R_ARM_ABS32:
|
||||
{
|
||||
intptr_t initial_addend;
|
||||
/* (S + A) | T where T is 0 */
|
||||
CHECK_RELOC_OFFSET(sizeof(void *));
|
||||
initial_addend =
|
||||
*(intptr_t *)(target_section_addr + (uint32)reloc_offset);
|
||||
*(uintptr_t *)(target_section_addr + reloc_offset) =
|
||||
(uintptr_t)symbol_addr + initial_addend
|
||||
+ (intptr_t)reloc_addend;
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
if (error_buf != NULL)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user