gnh1201/wasm-micro-runtime
1
0
Fork 0
mirror of https://github.com/bytecodealliance/wasm-micro-runtime.git synced 2025-03-11 00:15:29 +00:00
Code Issues Actions 4 Packages Projects Releases Wiki Activity

Fix XIP issue caused by rem_s on RISC-V (#1619)

Browse Source
This commit is contained in:
Huang Qi 2022-10-19 16:46:26 +08:00 committed by GitHub
parent 1c5034bdfa
commit 73809efb5d
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 19 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
core/config.h
View File

@ -136,6 +136,10 @@
#define WASM_ENABLE_UVWASI 0
#endif
#ifndef WASM_ENABLE_WASI_NN
#define WASM_ENABLE_WASI_NN 0
#endif
/* Default disable libc emcc */
#ifndef WASM_ENABLE_LIBC_EMCC
#define WASM_ENABLE_LIBC_EMCC 0

6
core/iwasm/aot/aot_intrinsic.c
View File

@ -657,9 +657,9 @@ aot_intrinsic_fill_capability_flags(AOTCompContext *comp_ctx)
add_f32_common_intrinsics(comp_ctx);
add_f64_common_intrinsics(comp_ctx);
add_common_float_integer_convertion(comp_ctx);
}
else if (!strncmp(comp_ctx->target_arch, "riscv32", 7)) {
add_i64_common_intrinsics(comp_ctx);
if (!strncmp(comp_ctx->target_arch, "riscv32", 7)) {
add_i64_common_intrinsics(comp_ctx);
}
}
else if (!strncmp(comp_ctx->target_arch, "xtensa", 6)) {
/*

13
core/iwasm/compilation/aot_emit_numberic.c
View File

@ -331,6 +331,9 @@ compile_rems(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx,
{
LLVMValueRef phi, no_overflow_value, zero = is_i32 ? I32_ZERO : I64_ZERO;
LLVMBasicBlockRef block_curr, no_overflow_block, rems_end_block;
LLVMTypeRef param_types[2];
param_types[1] = param_types[0] = is_i32 ? I32_TYPE : I64_TYPE;
block_curr = LLVMGetInsertBlock(comp_ctx->builder);
@ -349,7 +352,15 @@ compile_rems(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx,
LLVMPositionBuilderAtEnd(comp_ctx->builder, no_overflow_block);
/* Calculate the rem value */
LLVM_BUILD_OP(SRem, left, right, no_overflow_value, "rem_s", false);
if (comp_ctx->disable_llvm_intrinsics && !is_i32
&& aot_intrinsic_check_capability(comp_ctx, "i64.rem_s")) {
no_overflow_value =
aot_call_llvm_intrinsic(comp_ctx, func_ctx, "rem_s", param_types[0],
param_types, 2, left, right);
}
else {
LLVM_BUILD_OP(SRem, left, right, no_overflow_value, "rem_s", false);
}
/* Jump to rems_end block */
if (!LLVMBuildBr(comp_ctx->builder, rems_end_block)) {