gnh1201/wasm-micro-runtime
1
0
Fork 0
mirror of https://github.com/bytecodealliance/wasm-micro-runtime.git synced 2025-05-07 12:16:24 +00:00
Code Issues Actions 9 Packages Projects Releases Wiki Activity

riscv: avoid llvm.cttz.i32/i64 for xip (#4248)

Browse Source 
LLVM 16 and later expands cttz intrinsic to a table lookup,
which involves some relocations. (unless ZBB is available,
in which case the native instructions are preferred over
the table-based lowering.)

cf. https://reviews.llvm.org/D128911
This commit is contained in:
YAMAMOTO Takashi 2025-05-07 10:42:51 +09:00 committed by GitHub
parent 1996c18c4b
commit bb36a43fa4
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
1 changed files with 11 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
core/iwasm/aot/aot_intrinsic.c
View File

@ -898,6 +898,17 @@ aot_intrinsic_fill_capability_flags(AOTCompContext *comp_ctx)
if (!strncmp(comp_ctx->target_arch, "riscv32", 7)) {
add_i64_common_intrinsics(comp_ctx);
}
/*
* LLVM 16 and later expands cttz intrinsic to a table lookup,
* which involves some relocations. (unless ZBB is available,
* in which case the native instructions are preferred over
* the table-based lowering.)
* https://reviews.llvm.org/D128911
*/
#if LLVM_VERSION_MAJOR >= 16
add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_I32_CTZ);
add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_I64_CTZ);
#endif
}
else if (!strncmp(comp_ctx->target_arch, "xtensa", 6)) {
/*