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Fix AOT compiler simd shift opcodes (#2715)
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@ -30,11 +30,11 @@ simd_shift(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx,
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LLVM_CONST(i16x8_vec_zero),
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LLVM_CONST(i16x8_vec_zero),
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LLVM_CONST(i32x4_vec_zero),
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LLVM_CONST(i32x4_vec_zero),
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LLVM_CONST(i64x2_vec_zero) };
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LLVM_CONST(i64x2_vec_zero) };
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LLVMValueRef lane_bits[] = {
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LLVMValueRef lane_shift_masks[] = {
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LLVM_CONST(i32_eight),
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LLVMConstInt(I32_TYPE, 7, true),
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LLVMConstInt(I32_TYPE, 16, true),
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LLVMConstInt(I32_TYPE, 15, true),
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LLVMConstInt(I32_TYPE, 32, true),
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LLVMConstInt(I32_TYPE, 31, true),
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LLVMConstInt(I32_TYPE, 64, true),
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LLVMConstInt(I32_TYPE, 63, true),
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};
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};
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POP_I32(offset);
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POP_I32(offset);
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@ -44,11 +44,11 @@ simd_shift(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx,
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return false;
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return false;
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}
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}
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/* offset mod LaneBits */
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/* offset = offset & shift_mask */
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if (!lane_bits[itype]
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if (!lane_shift_masks[itype]
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|| !(offset = LLVMBuildSRem(comp_ctx->builder, offset, lane_bits[itype],
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|| !(offset = LLVMBuildAnd(comp_ctx->builder, offset,
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"offset_fix"))) {
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lane_shift_masks[itype], "offset_fix"))) {
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HANDLE_FAILURE("LLVMBuildSRem");
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HANDLE_FAILURE("LLVMBuildAnd");
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return false;
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return false;
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}
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}
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