From cfcaca3d355d7fafa9b851417cd8c754f0858c21 Mon Sep 17 00:00:00 2001 From: wenyongh Date: Thu, 5 Mar 2020 21:46:24 +0800 Subject: [PATCH] Refine build script of zephyr product-mini, enable aot soft-float support (#188) --- core/iwasm/aot/arch/aot_reloc_arm.c | 30 ++++++++- core/iwasm/aot/arch/aot_reloc_thumb.c | 30 ++++++++- core/iwasm/compilation/aot_emit_numberic.c | 61 ++++++++++++++++--- doc/build_wamr.md | 21 ++++--- product-mini/platforms/linux/build_llvm.sh | 4 +- product-mini/platforms/zephyr/simple/build.sh | 35 +++++++++++ product-mini/platforms/zephyr/simple/prj.conf | 5 -- .../zephyr/simple/prj_nucleo767zi.conf | 7 +++ .../zephyr/simple/prj_qemu_x86_nommu.conf | 6 ++ samples/gui/README.md | 2 +- 10 files changed, 171 insertions(+), 30 deletions(-) create mode 100755 product-mini/platforms/zephyr/simple/build.sh delete mode 100644 product-mini/platforms/zephyr/simple/prj.conf create mode 100644 product-mini/platforms/zephyr/simple/prj_nucleo767zi.conf create mode 100644 product-mini/platforms/zephyr/simple/prj_qemu_x86_nommu.conf diff --git a/core/iwasm/aot/arch/aot_reloc_arm.c b/core/iwasm/aot/arch/aot_reloc_arm.c index 0dac4f663..16ea56b18 100644 --- a/core/iwasm/aot/arch/aot_reloc_arm.c +++ b/core/iwasm/aot/arch/aot_reloc_arm.c @@ -44,6 +44,20 @@ void __aeabi_idivmod(); void __aeabi_uidivmod(); void __aeabi_ldivmod(); void __aeabi_uldivmod(); +void __aeabi_i2d(); +void __aeabi_dadd(); +void __aeabi_ddiv(); +void __aeabi_dcmplt(); +void __aeabi_dcmpun(); +void __aeabi_dcmple(); +void __aeabi_dcmpge(); +void __aeabi_d2iz(); +void __aeabi_fcmplt(); +void __aeabi_fcmpun(); +void __aeabi_fcmple(); +void __aeabi_fcmpge(); +void __aeabi_f2iz(); +void __aeabi_f2d(); static SymbolMap target_sym_map[] = { REG_COMMON_SYMBOLS, @@ -77,7 +91,21 @@ static SymbolMap target_sym_map[] = { REG_SYM(__aeabi_idivmod), REG_SYM(__aeabi_uidivmod), REG_SYM(__aeabi_ldivmod), - REG_SYM(__aeabi_uldivmod) + REG_SYM(__aeabi_uldivmod), + REG_SYM(__aeabi_i2d), + REG_SYM(__aeabi_dadd), + REG_SYM(__aeabi_ddiv), + REG_SYM(__aeabi_dcmplt), + REG_SYM(__aeabi_dcmpun), + REG_SYM(__aeabi_dcmple), + REG_SYM(__aeabi_dcmpge), + REG_SYM(__aeabi_d2iz), + REG_SYM(__aeabi_fcmplt), + REG_SYM(__aeabi_fcmpun), + REG_SYM(__aeabi_fcmple), + REG_SYM(__aeabi_fcmpge), + REG_SYM(__aeabi_f2iz), + REG_SYM(__aeabi_f2d), }; static void diff --git a/core/iwasm/aot/arch/aot_reloc_thumb.c b/core/iwasm/aot/arch/aot_reloc_thumb.c index 86e2e3305..af0c99d95 100644 --- a/core/iwasm/aot/arch/aot_reloc_thumb.c +++ b/core/iwasm/aot/arch/aot_reloc_thumb.c @@ -43,6 +43,20 @@ void __aeabi_idivmod(); void __aeabi_uidivmod(); void __aeabi_ldivmod(); void __aeabi_uldivmod(); +void __aeabi_i2d(); +void __aeabi_dadd(); +void __aeabi_ddiv(); +void __aeabi_dcmplt(); +void __aeabi_dcmpun(); +void __aeabi_dcmple(); +void __aeabi_dcmpge(); +void __aeabi_d2iz(); +void __aeabi_fcmplt(); +void __aeabi_fcmpun(); +void __aeabi_fcmple(); +void __aeabi_fcmpge(); +void __aeabi_f2iz(); +void __aeabi_f2d(); static SymbolMap target_sym_map[] = { REG_COMMON_SYMBOLS, @@ -76,7 +90,21 @@ static SymbolMap target_sym_map[] = { REG_SYM(__aeabi_idivmod), REG_SYM(__aeabi_uidivmod), REG_SYM(__aeabi_ldivmod), - REG_SYM(__aeabi_uldivmod) + REG_SYM(__aeabi_uldivmod), + REG_SYM(__aeabi_i2d), + REG_SYM(__aeabi_dadd), + REG_SYM(__aeabi_ddiv), + REG_SYM(__aeabi_dcmplt), + REG_SYM(__aeabi_dcmpun), + REG_SYM(__aeabi_dcmple), + REG_SYM(__aeabi_dcmpge), + REG_SYM(__aeabi_d2iz), + REG_SYM(__aeabi_fcmplt), + REG_SYM(__aeabi_fcmpun), + REG_SYM(__aeabi_fcmple), + REG_SYM(__aeabi_fcmpge), + REG_SYM(__aeabi_f2iz), + REG_SYM(__aeabi_f2d), }; static void diff --git a/core/iwasm/compilation/aot_emit_numberic.c b/core/iwasm/compilation/aot_emit_numberic.c index 46ed1cc3d..93f4ada72 100644 --- a/core/iwasm/compilation/aot_emit_numberic.c +++ b/core/iwasm/compilation/aot_emit_numberic.c @@ -857,13 +857,34 @@ fail: return false; } +static bool +is_targeting_soft_float(LLVMTargetMachineRef target_machine) +{ + bool ret = false; + char *feature_string; + + if (!(feature_string = + LLVMGetTargetMachineFeatureString(target_machine))) { + aot_set_last_error("llvm get target machine feature string fail."); + return false; + } + + ret = strstr(feature_string, "+soft-float") ? true : false; + LLVMDisposeMessage(feature_string); + return ret; +} + static bool compile_op_float_arithmetic(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx, FloatArithmetic arith_op, bool is_f32) { switch (arith_op) { case FLOAT_ADD: - DEF_FP_BINARY_OP(call_llvm_float_expermental_constrained_intrinsic( + if (is_targeting_soft_float(comp_ctx->target_machine)) + DEF_FP_BINARY_OP(LLVMBuildFAdd(comp_ctx->builder, left, right, "fadd"), + "llvm build fadd fail."); + else + DEF_FP_BINARY_OP(call_llvm_float_expermental_constrained_intrinsic( comp_ctx, (is_f32 ? "llvm.experimental.constrained.fadd.f32" @@ -873,10 +894,14 @@ compile_op_float_arithmetic(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx, right, comp_ctx->fp_rounding_mode, comp_ctx->fp_exception_behavior), - NULL); + NULL); return true; case FLOAT_SUB: - DEF_FP_BINARY_OP(call_llvm_float_expermental_constrained_intrinsic( + if (is_targeting_soft_float(comp_ctx->target_machine)) + DEF_FP_BINARY_OP(LLVMBuildFSub(comp_ctx->builder, left, right, "fsub"), + "llvm build fsub fail."); + else + DEF_FP_BINARY_OP(call_llvm_float_expermental_constrained_intrinsic( comp_ctx, (is_f32 ? "llvm.experimental.constrained.fsub.f32" @@ -886,10 +911,14 @@ compile_op_float_arithmetic(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx, right, comp_ctx->fp_rounding_mode, comp_ctx->fp_exception_behavior), - NULL); + NULL); return true; case FLOAT_MUL: - DEF_FP_BINARY_OP(call_llvm_float_expermental_constrained_intrinsic( + if (is_targeting_soft_float(comp_ctx->target_machine)) + DEF_FP_BINARY_OP(LLVMBuildFMul(comp_ctx->builder, left, right, "fmul"), + "llvm build fmul fail."); + else + DEF_FP_BINARY_OP(call_llvm_float_expermental_constrained_intrinsic( comp_ctx, (is_f32 ? "llvm.experimental.constrained.fmul.f32" @@ -899,10 +928,14 @@ compile_op_float_arithmetic(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx, right, comp_ctx->fp_rounding_mode, comp_ctx->fp_exception_behavior), - NULL); + NULL); return true; case FLOAT_DIV: - DEF_FP_BINARY_OP(call_llvm_float_expermental_constrained_intrinsic( + if (is_targeting_soft_float(comp_ctx->target_machine)) + DEF_FP_BINARY_OP(LLVMBuildFDiv(comp_ctx->builder, left, right, "fdiv"), + "llvm build fdiv fail."); + else + DEF_FP_BINARY_OP(call_llvm_float_expermental_constrained_intrinsic( comp_ctx, (is_f32 ? "llvm.experimental.constrained.fdiv.f32" @@ -912,7 +945,7 @@ compile_op_float_arithmetic(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx, right, comp_ctx->fp_rounding_mode, comp_ctx->fp_exception_behavior), - NULL); + NULL); return true; case FLOAT_MIN: DEF_FP_BINARY_OP(compile_op_float_min_max(comp_ctx, @@ -1017,7 +1050,15 @@ compile_op_float_math(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx, NULL); return true; case FLOAT_SQRT: - DEF_FP_UNARY_OP(call_llvm_libm_expermental_constrained_intrinsic( + if (is_targeting_soft_float(comp_ctx->target_machine)) + DEF_FP_UNARY_OP(call_llvm_float_math_intrinsic(comp_ctx, + is_f32 ? "llvm.sqrt.f32" : + "llvm.sqrt.f64", + is_f32, + operand), + NULL); + else + DEF_FP_UNARY_OP(call_llvm_libm_expermental_constrained_intrinsic( comp_ctx, (is_f32 ? "llvm.experimental.constrained.sqrt.f32" @@ -1026,7 +1067,7 @@ compile_op_float_math(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx, operand, comp_ctx->fp_rounding_mode, comp_ctx->fp_exception_behavior), - NULL); + NULL); return true; default: bh_assert(0); diff --git a/doc/build_wamr.md b/doc/build_wamr.md index eeac611f1..f5c3e48fc 100644 --- a/doc/build_wamr.md +++ b/doc/build_wamr.md @@ -155,18 +155,19 @@ cd zephyr/samples/ cp -a /product-mini/platforms/zephyr/simple . cd simple ln -s wamr -mkdir build && cd build -source ../../../zephyr-env.sh - -1. build for x86 -cmake -GNinja -DBOARD=qemu_x86_nommu .. -ninja -2. build for ARM -modify ../prj.conf, modify the commented line "# CONFIG_ARM_MPU is not set" to "CONFIG_ARM_MPU=y" -cmake -GNinja -DBOARD=nucleo_f767zi -DWAMR_BUILD_TARGET=THUMBV7 .. -ninja +source ../../zephyr-env.sh ``` + +1. build for x86 (qemu_x86_nommu) +``` Bash +./build.sh x86 +``` +2. build for ARM (nucleo_f767zi) +``` Bash +./build.sh stm32 +``` + Note: WAMR provides some features which can be easily configured by passing options to cmake, please see [Linux platform](./build_wamr.md#linux) for details. Currently in Zephyr, interpreter, AoT and builtin libc are enabled by default. diff --git a/product-mini/platforms/linux/build_llvm.sh b/product-mini/platforms/linux/build_llvm.sh index d58579264..29c5e5058 100755 --- a/product-mini/platforms/linux/build_llvm.sh +++ b/product-mini/platforms/linux/build_llvm.sh @@ -1,6 +1,6 @@ #!/bin/sh -# Copyright (C) 2019 Intel Corporation. All rights reserved. +# Copyright (C) 2020 Intel Corporation. All rights reserved. # SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception DEPS_DIR=${PWD}/../../../core/deps @@ -8,7 +8,7 @@ DEPS_DIR=${PWD}/../../../core/deps cd ${DEPS_DIR} if [ ! -d "llvm" ]; then echo "Clone llvm to core/deps/ .." - git clone https://github.com/llvm-mirror/llvm.git + git clone --depth 1 https://github.com/llvm-mirror/llvm.git fi cd llvm diff --git a/product-mini/platforms/zephyr/simple/build.sh b/product-mini/platforms/zephyr/simple/build.sh new file mode 100755 index 000000000..32a2c4000 --- /dev/null +++ b/product-mini/platforms/zephyr/simple/build.sh @@ -0,0 +1,35 @@ +#!/bin/bash + +# Copyright (C) 2019 Intel Corporation. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + +X86_TARGET="x86" +STM32_TARGET="stm32" + +if [ $# != 1 ] ; then + echo "USAGE:" + echo "$0 $X86_TARGET|$STM32_TARGET" + echo "Example:" + echo " $0 $X86_TARGET" + echo " $0 $STM32_TARGET" + exit 1 +fi + +TARGET=$1 + +if [ "$TARGET" = "$X86_TARGET" ] ; then + cp prj_qemu_x86_nommu.conf prj.conf + rm -fr build && mkdir build && cd build + cmake -GNinja -DBOARD=qemu_x86_nommu -DWAMR_BUILD_TARGET=X86_32 .. + ninja + ninja run +elif [ "$TARGET" = "$STM32_TARGET" ] ; then + cp prj_nucleo767zi.conf prj.conf + rm -fr build && mkdir build && cd build + cmake -GNinja -DBOARD=nucleo_f767zi -DWAMR_BUILD_TARGET=THUMBV7 .. + ninja + ninja flash +else + echo "unsupported target: $TARGET" + exit 1 +fi diff --git a/product-mini/platforms/zephyr/simple/prj.conf b/product-mini/platforms/zephyr/simple/prj.conf deleted file mode 100644 index 96db21f20..000000000 --- a/product-mini/platforms/zephyr/simple/prj.conf +++ /dev/null @@ -1,5 +0,0 @@ -# set CONFIG_ARM_MPU=y if run in ARM's board -# CONFIG_ARM_MPU is not set -CONFIG_STACK_SENTINEL=y -CONFIG_PRINTK=y -CONFIG_LOG=y diff --git a/product-mini/platforms/zephyr/simple/prj_nucleo767zi.conf b/product-mini/platforms/zephyr/simple/prj_nucleo767zi.conf new file mode 100644 index 000000000..c495644b7 --- /dev/null +++ b/product-mini/platforms/zephyr/simple/prj_nucleo767zi.conf @@ -0,0 +1,7 @@ +# Copyright (C) 2019 Intel Corporation. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + +CONFIG_ARM_MPU=y +CONFIG_STACK_SENTINEL=y +CONFIG_PRINTK=y +CONFIG_LOG=y diff --git a/product-mini/platforms/zephyr/simple/prj_qemu_x86_nommu.conf b/product-mini/platforms/zephyr/simple/prj_qemu_x86_nommu.conf new file mode 100644 index 000000000..7f4a32832 --- /dev/null +++ b/product-mini/platforms/zephyr/simple/prj_qemu_x86_nommu.conf @@ -0,0 +1,6 @@ +# Copyright (C) 2019 Intel Corporation. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception + +CONFIG_STACK_SENTINEL=y +CONFIG_PRINTK=y +CONFIG_LOG=y diff --git a/samples/gui/README.md b/samples/gui/README.md index 09cdc18fb..b9e589ba1 100644 --- a/samples/gui/README.md +++ b/samples/gui/README.md @@ -117,4 +117,4 @@ First, connect PC and STM32 with UART. Then install to use host_tool.
The graphic user interface demo photo: -![WAMR samples diagram](../../doc/pics/vgl_demo.png "WAMR samples diagram") \ No newline at end of file +![WAMR samples diagram](../../doc/pics/vgl_demo.png "WAMR samples diagram")