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Add cmake variable to disable writing gs register (#2284)

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Support to disable writing x86-64 GS segment register by
  `cmake -DWAMR_DISABLE_WRITE_GS_BASE=1`
and update document. Issue was reported in #2273.
This commit is contained in:
Wenyong Huang 2023-06-13 10:26:25 +08:00 committed by GitHub
parent 7ec77598dd
commit fe830d805d
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4 changed files with 21 additions and 1 deletions
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4
build-scripts/config_common.cmake
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@ -392,3 +392,7 @@ if (WAMR_BUILD_STATIC_PGO EQUAL 1)
add_definitions (-DWASM_ENABLE_STATIC_PGO=1)
message (" AOT static PGO enabled")
endif ()
if (WAMR_DISABLE_WRITE_GS_BASE EQUAL 1)
add_definitions (-DWASM_DISABLE_WRITE_GS_BASE=1)
message (" Write linear memory base addr to x86 GS register disabled")
endif ()

7
core/config.h
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@ -449,4 +449,11 @@
#define WASM_ENABLE_STATIC_PGO 0
#endif
/* Disable writing linear memory base address to GS segment register,
by default only in linux x86-64, linear memory base addr is written
to GS segment register before calling wasm/aot function. */
#ifndef WASM_DISABLE_WRITE_GS_BASE
#define WASM_DISABLE_WRITE_GS_BASE 0
#endif
#endif /* end of _CONFIG_H_ */

2
core/shared/platform/linux/platform_internal.h
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@ -63,6 +63,7 @@ typedef sem_t korp_sem;
#define bh_socket_t int
#if WASM_DISABLE_WRITE_GS_BASE == 0
#if defined(BUILD_TARGET_X86_64) || defined(BUILD_TARGET_AMD_64)
#define os_writegsbase(base_addr) \
do { \
@ -76,6 +77,7 @@ typedef sem_t korp_sem;
_writegsbase_u64(((uint64)(uintptr_t)base_addr))
#endif
#endif
#endif
#if WASM_DISABLE_HW_BOUND_CHECK == 0
#if defined(BUILD_TARGET_X86_64) || defined(BUILD_TARGET_AMD_64) \

9
doc/build_wamr.md
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@ -98,7 +98,7 @@ cmake -DWAMR_BUILD_PLATFORM=linux -DWAMR_BUILD_TARGET=ARM
#### **Disable boundary check with hardware trap**
- **WAMR_DISABLE_HW_BOUND_CHECK**=1/0, default to enable if not set and supported by platform
> Note: by default only platform [linux/darwin/android/windows/vxworks 64-bit](https://github.com/bytecodealliance/wasm-micro-runtime/blob/5fb5119239220b0803e7045ca49b0a29fe65e70e/core/shared/platform/linux/platform_internal.h#L81) will enable the boundary check with hardware trap feature, for 32-bit platforms it's automatically disabled even when the flag set to 0, and the wamrc tool will generate AOT code without boundary check instructions in all 64-bit targets except SGX to improve performance. The boundary check includes linear memory access boundary and native stack access boundary, if `WAMR_DISABLE_STACK_HW_BOUND_CHECK` below isn't set.
> Note: by default only platform [linux/darwin/android/windows/vxworks 64-bit](https://github.com/bytecodealliance/wasm-micro-runtime/blob/5fb5119239220b0803e7045ca49b0a29fe65e70e/core/shared/platform/linux/platform_internal.h#L81) will enable the boundary check with hardware trap feature, for 32-bit platforms it's automatically disabled even when the flag is set to 0, and the wamrc tool will generate AOT code without boundary check instructions in all 64-bit targets except SGX to improve performance. The boundary check includes linear memory access boundary and native stack access boundary, if `WAMR_DISABLE_STACK_HW_BOUND_CHECK` below isn't set.
#### **Disable native stack boundary check with hardware trap**
- **WAMR_DISABLE_STACK_HW_BOUND_CHECK**=1/0, default to enable if not set and supported by platform, same as `WAMR_DISABLE_HW_BOUND_CHECK`.
@ -198,6 +198,13 @@ Currently we only profile the memory consumption of module, module_instance and
- **WAMR_BUILD_STACK_GUARD_SIZE**=n, default to N/A if not set.
> Note: By default, the stack guard size is 1K (1024) or 24K (if uvwasi enabled).
### **Disable the writing linear memory base address to x86 GS segment register
- **WAMR_DISABLE_WRITE_GS_BASE**=1/0, default to enable if not set and supported by platform
> Note: by default only platform [linux x86-64](https://github.com/bytecodealliance/wasm-micro-runtime/blob/5fb5119239220b0803e7045ca49b0a29fe65e70e/core/shared/platform/linux/platform_internal.h#L67) will enable this feature, for 32-bit platforms it's automatically disabled even when the flag is set to 0. In linux x86-64, writing the linear memory base address to x86 GS segment register may be used to speedup the linear memory access for LLVM AOT/JIT, when `--enable-segue=[<flags>]` option is added for `wamrc` or `iwasm`.
### **Enable running PGO(Profile-Guided Optimization) instrumented AOT file**
- **WAMR_BUILD_STATIC_PGO**=1/0, default to disable if not set
**Combination of configurations:**
We can combine the configurations. For example, if we want to disable interpreter, enable AOT and WASI, we can run command: