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4 Commits

Author SHA1 Message Date
dongsheng28849455
e517dbc7b2
XIP adaptation for xtensa platform (#1636) 
Add macro WASM_ENABLE_WORD_ALING_READ to enable reading
1/2/4 and n bytes data from vram buffer, which requires 4-byte addr
alignment reading.

Eliminate XIP AOT relocations related to the below ones:
   i32_div_u, f32_min, f32_max, f32_ceil, f32_floor, f32_trunc, f32_rint
 2022-10-31 17:25:24 +08:00
Wenyong Huang
17f62ad472
Apply clang-format for core/shared and product-mini files (#785) 
Apply clang-format for core/shared and product-mini files
 2021-10-14 09:12:07 +08:00
wenyongh
752826a667
Implement multi-module feature and bulk-memory feature (#271) 
Refine wasm loader and aot loader
Fix potential issue of os_mmap/os_munmap
Update document
 2020-06-02 14:53:06 +08:00
Xu Jun
f1a0e75ab7
re-org platform APIs, simplify porting process (#201) 
Co-authored-by: Xu Jun <jun1.xu@intel.com>
 2020-03-16 16:43:57 +08:00