Enable RISCV AOT support, the supported ABIs are LP64 and LP64D for riscv64, ILP32 and ILP32D for riscv32.
For wamrc:
use --target=riscv64/riscv32 to specify the target arch of output AOT file,
use --target-abi=lp64d/lp64/ilp32d/ilp32 to specify the target ABI,
if --target-abi isn't specified, by default lp64d is used for riscv64, and ilp32d is used for riscv32.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Co-authored-by: wenyongh <wenyong.huang@intel.com>
Implement Windows thread/mutex/cond related APIs to support Windows multi-thread feature
Change Windows HW boundary check implementation for multi-thread: change SEH to VEH
Fix wasm-c-api issue of getting AOTFunctionInstance by index, fix wasm-c-api compile warnings
Enable to build invokeNative_general.c with cmake variable
Fix several issues in lib-pthread
Disable two LLVM passes in multi-thread mode to reserve volatile semantic
Update docker script and document to build iwasm with Docker image
Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
Fixed a typo in aot_reloc_aarch64.c.
Remove -m32 option in host tool CMakeLists.txt and change data type of structure fields to make host tool work in 64-bit.
Signed-off-by: Bao Haojun <baohaojun@lixiang.com>
Implement Windows PE file relocation type IMAGE_REL_AMD64_ADDR64/ADDR32/REL32, implement relocation for symbol "__xmm@xxx"/"__plt@xxx"/".rdata", implement Windows invokeNative simd asm code and enable SIMD by default for windows platform. Also update wamrc tool.
Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
Motivation:
we found some issues during enable the WAMR on arm devices, such as relocation issues, stack alignment issues.
Proposed change:
We optimized the relocation process for arm platform, for relocation jump table, the SP should be aligned to 16 bytes. And we also make "getentropy" worked for other non-supported platform.
Add the Windows COFF format support to wamr-compiler and iwasm can
load and excute it on Windows(X64) platform.
Signed-off-by: Wu Zhongmin <vwzm@live.com>
Signed-off-by: Xiaokang Qin <xiaokang.qxk@antgroup.com>
Co-authored-by: Wu Zhongmin <vwzm@live.com>
