mirror of
https://github.com/bytecodealliance/wasm-micro-runtime.git
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e87a554616
Refactor LLVM JIT for some purposes: - To simplify the source code of JIT compilation - To simplify the JIT modes - To align with LLVM latest changes - To prepare for the Multi-tier JIT compilation, refer to #1302 The changes mainly include: - Remove the MCJIT mode, replace it with ORC JIT eager mode - Remove the LLVM legacy pass manager (only keep the LLVM new pass manager) - Change the lazy mode's LLVM module/function binding: change each function in an individual LLVM module into all functions in a single LLVM module - Upgraded ORC JIT to ORCv2 JIT to enable lazy compilation Refer to #1468
360 lines
9.7 KiB
C++
360 lines
9.7 KiB
C++
/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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#include <llvm/Passes/StandardInstrumentations.h>
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#include <llvm/Support/Error.h>
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#include <llvm/ADT/SmallVector.h>
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#include <llvm/ADT/Twine.h>
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#include <llvm/ADT/Triple.h>
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#include <llvm/Analysis/TargetTransformInfo.h>
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#include <llvm/CodeGen/TargetPassConfig.h>
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#include <llvm/ExecutionEngine/ExecutionEngine.h>
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#include <llvm/MC/MCSubtargetInfo.h>
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#include <llvm/Support/TargetSelect.h>
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#include <llvm/Target/TargetMachine.h>
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#include <llvm-c/Core.h>
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#include <llvm-c/ExecutionEngine.h>
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#include <llvm-c/Initialization.h>
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#include <llvm/ExecutionEngine/GenericValue.h>
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#include <llvm/ExecutionEngine/JITEventListener.h>
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#include <llvm/ExecutionEngine/RTDyldMemoryManager.h>
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#include <llvm/ExecutionEngine/Orc/LLJIT.h>
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#include <llvm/IR/DerivedTypes.h>
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#include <llvm/IR/Module.h>
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#include <llvm/IR/Instructions.h>
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#include <llvm/IR/IntrinsicInst.h>
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#include <llvm/IR/LegacyPassManager.h>
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#include <llvm/Support/CommandLine.h>
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#include <llvm/Support/ErrorHandling.h>
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#include <llvm/Target/CodeGenCWrappers.h>
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#include <llvm/Target/TargetMachine.h>
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#include <llvm/Target/TargetOptions.h>
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#include <llvm/Transforms/Utils/LowerMemIntrinsics.h>
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#include <llvm/Transforms/Vectorize/LoopVectorize.h>
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#include <llvm/Transforms/Vectorize/LoadStoreVectorizer.h>
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#include <llvm/Transforms/Vectorize/SLPVectorizer.h>
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#include <llvm/Transforms/Scalar/LoopRotation.h>
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#include <llvm/Transforms/Scalar/SimpleLoopUnswitch.h>
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#include <llvm/Transforms/Scalar/LICM.h>
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#include <llvm/Transforms/Scalar/GVN.h>
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#include <llvm/Passes/PassBuilder.h>
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#include <llvm/Analysis/TargetLibraryInfo.h>
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#if LLVM_VERSION_MAJOR >= 12
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#include <llvm/Analysis/AliasAnalysis.h>
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#endif
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#include <cstring>
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#include "../aot/aot_runtime.h"
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#include "aot_llvm.h"
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using namespace llvm;
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using namespace llvm::orc;
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LLVM_C_EXTERN_C_BEGIN
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bool
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aot_check_simd_compatibility(const char *arch_c_str, const char *cpu_c_str);
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void
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aot_add_expand_memory_op_pass(LLVMPassManagerRef pass);
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void
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aot_add_simple_loop_unswitch_pass(LLVMPassManagerRef pass);
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void
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aot_apply_llvm_new_pass_manager(AOTCompContext *comp_ctx, LLVMModuleRef module);
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LLVM_C_EXTERN_C_END
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ExitOnError ExitOnErr;
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class ExpandMemoryOpPass : public llvm::ModulePass
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{
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public:
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static char ID;
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ExpandMemoryOpPass()
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: ModulePass(ID)
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{}
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bool runOnModule(Module &M) override;
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bool expandMemIntrinsicUses(Function &F);
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StringRef getPassName() const override
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{
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return "Expand memory operation intrinsics";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override
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{
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AU.addRequired<TargetTransformInfoWrapperPass>();
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}
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};
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char ExpandMemoryOpPass::ID = 0;
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bool
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ExpandMemoryOpPass::expandMemIntrinsicUses(Function &F)
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{
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Intrinsic::ID ID = F.getIntrinsicID();
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bool Changed = false;
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for (auto I = F.user_begin(), E = F.user_end(); I != E;) {
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Instruction *Inst = cast<Instruction>(*I);
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++I;
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switch (ID) {
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case Intrinsic::memcpy:
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{
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auto *Memcpy = cast<MemCpyInst>(Inst);
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Function *ParentFunc = Memcpy->getParent()->getParent();
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const TargetTransformInfo &TTI =
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getAnalysis<TargetTransformInfoWrapperPass>().getTTI(
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*ParentFunc);
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expandMemCpyAsLoop(Memcpy, TTI);
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Changed = true;
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Memcpy->eraseFromParent();
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break;
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}
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case Intrinsic::memmove:
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{
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auto *Memmove = cast<MemMoveInst>(Inst);
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expandMemMoveAsLoop(Memmove);
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Changed = true;
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Memmove->eraseFromParent();
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break;
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}
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case Intrinsic::memset:
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{
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auto *Memset = cast<MemSetInst>(Inst);
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expandMemSetAsLoop(Memset);
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Changed = true;
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Memset->eraseFromParent();
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break;
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}
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default:
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break;
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}
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}
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return Changed;
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}
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bool
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ExpandMemoryOpPass::runOnModule(Module &M)
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{
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bool Changed = false;
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for (Function &F : M) {
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if (!F.isDeclaration())
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continue;
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switch (F.getIntrinsicID()) {
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case Intrinsic::memcpy:
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case Intrinsic::memmove:
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case Intrinsic::memset:
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if (expandMemIntrinsicUses(F))
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Changed = true;
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break;
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default:
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break;
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}
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}
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return Changed;
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}
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void
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aot_add_expand_memory_op_pass(LLVMPassManagerRef pass)
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{
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reinterpret_cast<legacy::PassManager *>(pass)->add(
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new ExpandMemoryOpPass());
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}
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void
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aot_add_simple_loop_unswitch_pass(LLVMPassManagerRef pass)
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{
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reinterpret_cast<legacy::PassManager *>(pass)->add(
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createSimpleLoopUnswitchLegacyPass());
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}
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bool
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aot_check_simd_compatibility(const char *arch_c_str, const char *cpu_c_str)
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{
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#if WASM_ENABLE_SIMD != 0
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if (!arch_c_str || !cpu_c_str) {
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return false;
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}
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llvm::SmallVector<std::string, 1> targetAttributes;
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llvm::Triple targetTriple(arch_c_str, "", "");
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auto targetMachine =
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std::unique_ptr<llvm::TargetMachine>(llvm::EngineBuilder().selectTarget(
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targetTriple, "", std::string(cpu_c_str), targetAttributes));
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if (!targetMachine) {
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return false;
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}
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const llvm::Triple::ArchType targetArch =
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targetMachine->getTargetTriple().getArch();
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const llvm::MCSubtargetInfo *subTargetInfo =
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targetMachine->getMCSubtargetInfo();
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if (subTargetInfo == nullptr) {
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return false;
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}
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if (targetArch == llvm::Triple::x86_64) {
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return subTargetInfo->checkFeatures("+sse4.1");
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}
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else if (targetArch == llvm::Triple::aarch64) {
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return subTargetInfo->checkFeatures("+neon");
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}
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else {
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return false;
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}
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#else
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(void)arch_c_str;
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(void)cpu_c_str;
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return true;
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#endif /* WASM_ENABLE_SIMD */
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}
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void
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aot_apply_llvm_new_pass_manager(AOTCompContext *comp_ctx, LLVMModuleRef module)
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{
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TargetMachine *TM =
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reinterpret_cast<TargetMachine *>(comp_ctx->target_machine);
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PipelineTuningOptions PTO;
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PTO.LoopVectorization = true;
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PTO.SLPVectorization = true;
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PTO.LoopUnrolling = true;
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#ifdef DEBUG_PASS
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PassInstrumentationCallbacks PIC;
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PassBuilder PB(TM, PTO, None, &PIC);
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#else
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#if LLVM_VERSION_MAJOR == 12
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PassBuilder PB(false, TM, PTO);
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#else
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PassBuilder PB(TM, PTO);
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#endif
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#endif
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/* Register all the basic analyses with the managers */
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LoopAnalysisManager LAM;
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FunctionAnalysisManager FAM;
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CGSCCAnalysisManager CGAM;
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ModuleAnalysisManager MAM;
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/* Register the target library analysis directly and give it a
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customized preset TLI */
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std::unique_ptr<TargetLibraryInfoImpl> TLII(
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new TargetLibraryInfoImpl(Triple(TM->getTargetTriple())));
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FAM.registerPass([&] { return TargetLibraryAnalysis(*TLII); });
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/* Register the AA manager first so that our version is the one used */
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AAManager AA = PB.buildDefaultAAPipeline();
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FAM.registerPass([&] { return std::move(AA); });
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#ifdef DEBUG_PASS
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StandardInstrumentations SI(true, false);
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SI.registerCallbacks(PIC, &FAM);
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#endif
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PB.registerFunctionAnalyses(FAM);
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PB.registerLoopAnalyses(LAM);
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PB.registerModuleAnalyses(MAM);
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PB.registerCGSCCAnalyses(CGAM);
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PB.crossRegisterProxies(LAM, FAM, CGAM, MAM);
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#if LLVM_VERSION_MAJOR <= 13
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PassBuilder::OptimizationLevel OL;
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switch (comp_ctx->opt_level) {
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case 0:
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OL = PassBuilder::OptimizationLevel::O0;
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break;
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case 1:
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OL = PassBuilder::OptimizationLevel::O1;
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break;
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case 2:
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OL = PassBuilder::OptimizationLevel::O2;
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break;
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case 3:
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default:
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OL = PassBuilder::OptimizationLevel::O3;
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break;
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}
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#else
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OptimizationLevel OL;
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switch (comp_ctx->opt_level) {
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case 0:
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OL = OptimizationLevel::O0;
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break;
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case 1:
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OL = OptimizationLevel::O1;
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break;
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case 2:
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OL = OptimizationLevel::O2;
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break;
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case 3:
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default:
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OL = OptimizationLevel::O3;
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break;
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}
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#endif /* end of LLVM_VERSION_MAJOR */
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bool disable_llvm_lto = comp_ctx->disable_llvm_lto;
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#if WASM_ENABLE_SPEC_TEST != 0
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disable_llvm_lto = true;
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#endif
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Module *M = reinterpret_cast<Module *>(module);
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if (disable_llvm_lto) {
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for (Function &F : *M) {
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F.addFnAttr("disable-tail-calls", "true");
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}
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}
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ModulePassManager MPM;
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if (comp_ctx->is_jit_mode) {
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const char *Passes =
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"mem2reg,instcombine,simplifycfg,jump-threading,indvars";
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ExitOnErr(PB.parsePassPipeline(MPM, Passes));
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}
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else {
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FunctionPassManager FPM;
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/* Apply Vectorize related passes for AOT mode */
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FPM.addPass(LoopVectorizePass());
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FPM.addPass(SLPVectorizerPass());
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FPM.addPass(LoadStoreVectorizerPass());
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/*
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FPM.addPass(createFunctionToLoopPassAdaptor(LICMPass()));
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FPM.addPass(createFunctionToLoopPassAdaptor(LoopRotatePass()));
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FPM.addPass(createFunctionToLoopPassAdaptor(SimpleLoopUnswitchPass()));
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*/
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MPM.addPass(createModuleToFunctionPassAdaptor(std::move(FPM)));
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if (!disable_llvm_lto) {
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/* Apply LTO for AOT mode */
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#if LLVM_VERSION_MAJOR < 14
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MPM.addPass(PB.buildLTODefaultPipeline(OL, NULL));
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#else
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MPM.addPass(PB.buildLTOPreLinkDefaultPipeline(OL));
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#endif
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}
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else {
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MPM.addPass(PB.buildPerModuleDefaultPipeline(OL));
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}
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}
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MPM.run(*M, MAM);
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}
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