wasm-micro-runtime/core/iwasm
teamchong edbcbb77da fix(aot): reserve x18 register on macOS ARM64
Apple reserves CPU register x18 for TLS on ARM64. When generating AOT
code for aarch64 on macOS, LLVM may use x18, causing crashes when the
AOT code runs on macOS ARM64 (M1/M2/M3).

This patch:
1. Detects darwin/macho ABI and sets correct vendor string
2. Detects darwin/apple in default triple for platform detection
3. Adds +reserve-x18 to LLVM target features for aarch64 on macOS

The fix only applies when compiling on macOS ARM64 hosts, ensuring
generated AOT code is compatible with Apple's platform requirements.
2025-12-29 13:24:15 -05:00
..
aot Add missing functions from thumb arch (#4718) 2025-11-28 17:08:24 +08:00
common Ensure --addr-pool mask accepts numbers only (#4619) 2025-12-22 07:55:42 +08:00
compilation fix(aot): reserve x18 register on macOS ARM64 2025-12-29 13:24:15 -05:00
doc Fix some more spelling issues (#3393) 2024-05-08 09:30:29 +08:00
fast-jit add micro AMR_BUILD_LIME1 to enable minimal lime1 feature set (#4571) 2025-09-14 14:08:27 +08:00
include Add a runtime API for reset shared heap(chain) (#4740) 2025-12-15 09:56:55 +08:00
interpreter add a set of apis to configure wasi via InstantiationArgs2 (#4707) 2025-11-24 19:20:21 +08:00
libraries Ensure --addr-pool mask accepts numbers only (#4619) 2025-12-22 07:55:42 +08:00
README.md Add architecture diagram for wasm globals and classic-interp stack frame (#2058) 2023-03-25 09:39:20 +08:00