![]() * Implement the first few SIMD opcodes for fast interpreter (v128.const, v128.any_true) (#3818) Tested on the following code: ``` (module (import "wasi_snapshot_preview1" "proc_exit" (func $proc_exit (param i32))) (memory (export "memory") 1) ;; WASI entry point (func $main (export "_start") v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 v128.any_true if unreachable end v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 v128.any_true i32.const 0 i32.eq if unreachable end i32.const 0 call $proc_exit ) ) ``` * implement POP_V128() This is to simplify the simd implementation for fast interpreter * Add all SIMD operations into wasm_interp_fast switch * Add V128 comparison operations Tested using ``` (module (import "wasi_snapshot_preview1" "proc_exit" (func $proc_exit (param i32))) (memory (export "memory") 1) (func $assert_true (param v128) local.get 0 v128.any_true i32.eqz if unreachable end ) (func $main (export "_start") ;; Test v128.not v128.const i8x16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 v128.not v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 i8x16.eq call $assert_true ;; Test v128.and v128.const i8x16 255 255 255 255 0 0 0 0 255 255 255 255 0 0 0 0 v128.const i8x16 255 255 0 0 255 255 0 0 255 255 0 0 255 255 0 0 v128.and v128.const i8x16 255 255 0 0 0 0 0 0 255 255 0 0 0 0 0 0 i8x16.eq call $assert_true ;; Test v128.andnot v128.const i8x16 255 255 255 255 0 0 0 0 255 255 255 255 0 0 0 0 v128.const i8x16 255 255 0 0 255 255 0 0 255 255 0 0 255 255 0 0 v128.andnot v128.const i8x16 0 0 255 255 0 0 0 0 0 0 255 255 0 0 0 0 i8x16.eq call $assert_true ;; Test v128.or v128.const i8x16 255 255 0 0 0 0 255 255 255 255 0 0 0 0 255 0 v128.const i8x16 0 0 255 255 255 255 0 0 0 0 255 255 255 255 0 0 v128.or v128.const i8x16 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 0 i8x16.eq call $assert_true ;; Test v128.xor v128.const i8x16 255 255 0 0 255 255 0 0 255 255 0 0 255 255 0 0 v128.const i8x16 255 255 255 255 0 0 0 0 255 255 255 255 0 0 0 0 v128.xor v128.const i8x16 0 0 255 255 255 255 0 0 0 0 255 255 255 255 0 0 i8x16.eq call $assert_true i32.const 0 call $proc_exit ) ) ``` * Add first NEON SIMD opcode implementations to fast interpreter (#3859) Add some implementations of SIMD opcodes using NEON instructions. Tested using: ```wast (module (import "wasi_snapshot_preview1" "proc_exit" (func $proc_exit (param i32))) (memory (export "memory") 1) (func $assert_true (param v128) local.get 0 v128.any_true i32.eqz if unreachable end ) (func $main (export "_start") i32.const 0 i32.const 32 memory.grow drop i32.const 0 v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 v128.store i32.const 0 v128.load v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 i8x16.eq call $assert_true i32.const 16 v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 v128.store i32.const 16 v128.load v128.const i8x16 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 i8x16.eq call $assert_true i32.const 0 v128.load v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 i8x16.eq call $assert_true drop i32.const 0 i32.const 1 memory.grow drop i32.const 0 i64.const 0x7F80FF017E02FE80 i64.store i32.const 0 v128.load8x8_s v128.const i16x8 127 -128 -1 1 126 2 -2 -128 i16x8.eq call $assert_true i32.const 0 i64.const 0x80FE027E01FF807F i64.store i32.const 0 v128.load8x8_u v128.const i16x8 128 254 2 126 1 255 128 127 i16x8.eq call $assert_true i32.const 0 i64.const 0x8000FFFE7FFF0001 i64.store i32.const 0 v128.load16x4_s v128.const i32x4 -32768 -2 32767 1 i32x4.eq call $assert_true i32.const 0 i64.const 0x8000FFFE7FFF0001 i64.store i32.const 0 v128.load16x4_u v128.const i32x4 32768 65534 32767 1 i32x4.eq call $assert_true i32.const 0 i64.const 0x8000000000000001 i64.store i32.const 0 v128.load32x2_s v128.const i64x2 -2147483648 1 i64x2.eq call $assert_true i32.const 0 i64.const 0x8000000000000001 i64.store i32.const 0 v128.load32x2_u v128.const i64x2 2147483648 1 i64x2.eq call $assert_true call $proc_exit ) ) ``` * Emit imm for lane extract and replace (#3906) * Fix replacement value not being correct (#3919) * Implement load lanes opcodes for wasm (#3942) * Implement final SIMD opcodes: store lane (#4001) * Fix load/store (#4054) * Correctly use unsigned functions (#4055) * implement local and function calls for v128 in the fast interpreter * Fix splat opcodes, add V128 handling in preserve_referenced_local and reserve_block_ret * Fix incorrect memory overflow values + SIMD ifdefs * Fix load/load_splat macros * correct endif wasm loader * Update core/iwasm/interpreter/wasm_opcode.h * Fix spec tests when WASM_CPU_SUPPORTS_UNALIGNED_ADDR_ACCESS is 0 * Resolve merge conflicts arising from main -> dev/simd_for_interp and implement fast interpreter const offset loader support for V128 * Enable SIMDe tests on CI * Document WAMR_BUILD_LIB_SIMDE --------- Co-authored-by: James Marsh <mrshnja@amazon.co.uk> Co-authored-by: jammar1 <108334558+jammar1@users.noreply.github.com> Co-authored-by: Maks Litskevich <makslit@amazon.com> Co-authored-by: Marcin Kolny <marcin.kolny@gmail.com> Co-authored-by: Wenyong Huang <wenyong.huang@intel.com> |
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build-scripts | ||
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core | ||
doc | ||
language-bindings | ||
product-mini | ||
samples | ||
test-tools | ||
tests | ||
wamr-compiler | ||
wamr-sdk | ||
zephyr | ||
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ADOPTERS.md | ||
ATTRIBUTIONS.md | ||
CMakeLists.txt | ||
CODE_OF_CONDUCT.md | ||
CODEOWNERS | ||
CONTRIBUTING.md | ||
idf_component.yml | ||
LICENSE | ||
ORG_CODE_OF_CONDUCT.md | ||
README.md | ||
RELEASE_NOTES.md | ||
SConscript | ||
SECURITY.md | ||
TSC_Charter.md |
WebAssembly Micro Runtime
A Bytecode Alliance project
Build WAMR | Build AOT Compiler | Embed WAMR | Export Native API | Build Wasm Apps | Samples
WebAssembly Micro Runtime (WAMR) is a lightweight standalone WebAssembly (Wasm) runtime with small footprint, high performance and highly configurable features for applications cross from embedded, IoT, edge to Trusted Execution Environment (TEE), smart contract, cloud native and so on. It includes a few parts as below:
- VMcore: A set of runtime libraries for loading and running Wasm modules. It supports rich running modes including interpreter, Ahead-of-Time compilation(AoT) and Just-in-Time compilation (JIT). WAMR supports two JIT tiers - Fast JIT, LLVM JIT, and dynamic tier-up from Fast JIT to LLVM JIT.
- iwasm: The executable binary built with WAMR VMcore which supports WASI and command line interface.
- wamrc: The AOT compiler to compile Wasm file into AOT file
- Useful components and tools for building real solutions with WAMR vmcore:
- App-framework: A framework for supporting APIs for the Wasm applications
- App-manager: A framework for dynamical loading the Wasm module remotely
- WAMR-IDE: An experimental VSCode extension for developping WebAssembly applications with C/C++
Key features
- Full compliant to the W3C Wasm MVP
- Small runtime binary size (core vmlib on cortex-m4f with tail-call/bulk memroy/shared memroy support, text size from bloaty)
- ~58.9K for fast interpreter
- ~56.3K for classic interpreter
- ~29.4K for aot runtime
- ~21.4K for libc-wasi library
- ~3.7K for libc-builtin library
- Near to native speed by AOT and JIT
- Self-implemented AOT module loader to enable AOT working on Linux, Windows, MacOS, Android, SGX and MCU systems
- Choices of Wasm application libc support: the built-in libc subset for the embedded environment or WASI for the standard libc
- The simple C APIs to embed WAMR into host environment, see how to integrate WAMR and the API list
- The mechanism to export native APIs to Wasm applications, see how to register native APIs
- Multiple modules as dependencies, ref to document and sample
- Multi-thread, pthread APIs and thread management, ref to document and sample
- wasi-threads, ref to document and sample
- Linux SGX (Intel Software Guard Extension) support, ref to document
- Source debugging support, ref to document
- XIP (Execution In Place) support, ref to document
- Berkeley/Posix Socket support, ref to document and sample
- Multi-tier JIT and Running mode control
- Language bindings: Go, Python, Rust
Wasm post-MVP features
- wasm-c-api, ref to document and sample
- 128-bit SIMD, ref to samples/workload
- Reference Types, ref to document and sample
- Bulk memory operations, Shared memory, Memory64
- Tail-call, Garbage Collection, Exception Handling
Supported architectures and platforms
The WAMR VMcore supports the following architectures:
- X86-64, X86-32
- ARM, THUMB (ARMV7 Cortex-M7 and Cortex-A15 are tested)
- AArch64 (Cortex-A57 and Cortex-A53 are tested)
- RISCV64, RISCV32 (RISC-V LP64 and RISC-V LP64D are tested)
- XTENSA, MIPS, ARC
The following platforms are supported, click each link below for how to build iwasm on that platform. Refer to WAMR porting guide for how to port WAMR to a new platform.
- Linux, Linux SGX (Intel Software Guard Extension), MacOS, Android, Windows, Windows (MinGW, MSVC)
- Zephyr, AliOS-Things, VxWorks, NuttX, RT-Thread, ESP-IDF(FreeRTOS)
Getting started
- Build VM core and Build wamrc AOT compiler
- Build iwasm (mini product): Linux, SGX, MacOS and Windows
- Embed into C/C++, Embed into Python, Embed into Go, Embed in Rust
- Register native APIs for Wasm applications
- Build wamrc AOT compiler
- Build Wasm applications
- Port WAMR to a new platform
- VS Code development container
- Samples and Benchmarks
- End-user APIs documentation
Performance and memory
- Blog: The WAMR memory model
- Blog: Understand WAMR heaps and stacks
- Blog: Introduction to WAMR running modes
- Memory usage tuning: the memory model and how to tune the memory usage
- Memory usage profiling: how to profile the memory usage
- Performance tuning: how to tune the performance
- Benchmarks: checkout these links for how to run the benchmarks: PolyBench, CoreMark, Sightglass, JetStream2
- Performance and footprint data: the performance and footprint data
Project Technical Steering Committee
The WAMR PTSC Charter governs the operations of the project TSC. The current TSC members:
- dongsheng28849455 - Dongsheng Yan, dongsheng.yan@sony.com
- loganek - Marcin Kolny, mkolny@amazon.co.uk
- lum1n0us - Liang He, liang.he@intel.com
- no1wudi Qi Huang, huangqi3@xiaomi.com
- qinxk-inter - Xiaokang Qin, xiaokang.qxk@antgroup.com
- ttrenner - Trenner, Thomas, trenner.thomas@siemens.com
- wei-tang - Wei Tang, tangwei.tang@antgroup.com
- wenyongh - Wenyong Huang, wenyong.huang@intel.com
- woodsmc - Woods, Chris, chris.woods@siemens.com
- xujuntwt95329 - Jun Xu, Jun1.Xu@intel.com
- xwang98 - Xin Wang, xin.wang@intel.com (chair)
- yamt - Takashi Yamamoto, yamamoto@midokura.com
License
WAMR uses the same license as LLVM: the Apache 2.0 license
with the LLVM
exception. See the LICENSE file for details. This license allows you to freely
use, modify, distribute and sell your own products based on WAMR.
Any contributions you make will be under the same license.