Allow to use `cmake -DWAMR_CONFIGURABLE_BOUNDS_CHECKS=1` to
build iwasm, and then run `iwasm --disable-bounds-checks` to disable the
memory access boundary checks.
And add two APIs:
`wasm_runtime_set_bounds_checks` and `wasm_runtime_is_bounds_checks_enabled`
Add a new options to control the native stack hw bound check feature:
- Besides the original option `cmake -DWAMR_DISABLE_HW_BOUND_CHECK=1/0`,
add a new option `cmake -DWAMR_DISABLE_STACK_HW_BOUND_CHECK=1/0`
- When the linear memory hw bound check is disabled, the stack hw bound check
will be disabled automatically, no matter what the input option is
- When the linear memory hw bound check is enabled, the stack hw bound check
is enabled/disabled according to the value of input option
- Besides the original option `--bounds-checks=1/0`, add a new option
`--stack-bounds-checks=1/0` for wamrc
Refer to: https://github.com/bytecodealliance/wasm-micro-runtime/issues/1677
Add macro WASM_ENABLE_WORD_ALING_READ to enable reading
1/2/4 and n bytes data from vram buffer, which requires 4-byte addr
alignment reading.
Eliminate XIP AOT relocations related to the below ones:
i32_div_u, f32_min, f32_max, f32_ceil, f32_floor, f32_trunc, f32_rint
Unbreak builds with a bit older nuttx/apps for now.
Note: The default value here (0) was chosen to match the new default
in nuttx/apps, which is different from the old value used before
the introduction of WASM_STACK_GUARD_SIZE. (1024)
Add a new option WAMR_BUILD_STACK_GUARD_SIZE to set the custom
stack guard size. For most RTOS systems, we use the native stack base
address as the check boundary which may be not safe as POSIX based
systems (like Linux).
Since DPFPU depends on FPU, if FPU is enabled we will never enter DPFPU
branch since `ifeq (${CONFIG_ARCH_FPU}, y)` is always true.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Applied on the nuttx platform, some memory configurations are added,
and aot and interp can be completely closed or opened, thereby reducing
the flash size.
Implement XIP (Execution In Place) feature for AOT mode to enable running the AOT code inside AOT file directly, without memory mapping the executable memory for AOT code and applying relocations for text section. Developer can use wamrc with "--enable-indirect-mode --disable-llvm-intrinsics" flags to generate the AOT file and run iwasm with "--xip" flag. Known issues: there might still be some relocations in the text section which access the ".rodata" like sections.
And also enable ARC target support for both interpreter mode and AOT mode.
Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
Enable RISCV AOT support, the supported ABIs are LP64 and LP64D for riscv64, ILP32 and ILP32D for riscv32.
For wamrc:
use --target=riscv64/riscv32 to specify the target arch of output AOT file,
use --target-abi=lp64d/lp64/ilp32d/ilp32 to specify the target ABI,
if --target-abi isn't specified, by default lp64d is used for riscv64, and ilp32d is used for riscv32.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Co-authored-by: wenyongh <wenyong.huang@intel.com>
And fix libc-builtin print float issue
Add a list to track all third party components
Fix compile error when MEMORY_TRACING is enabled
Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
