Commit Graph

36 Commits

Author SHA1 Message Date
Wenyong Huang
66cd90d847
Fix fast jit issues (#1201) 2022-06-02 16:41:48 +08:00
liang.he
9694ad7890
Implement inn.extend8_s, inn.extend16_s, i64.extend32_s (#1199) 2022-06-01 11:18:22 +08:00
liang.he
c93508939a
Lock register to avoid spilling it out by register allocator (#1188)
In one instruction, if one or multiple operands tending to lock some
hardware registers in IR phase, like EAX, EDX for DIV, ECX for SHIFT,
it leads to two known cases.

case 1: allocate VOID

`SHRU i250,i249,i3`. if pr_3 was allocated to vr_249 first, incoming
allocation of vr_3 leads a spill out of `vr_249` and clear the value
of `vr->hreg` of vr_249. When applying allocation result in FOREACH
in L732, a NULL will be assigned to.

case 2: unexpected spill out

`DIV_U i1,i1,i44`.  if allocation of vr_44 needs to spill out one
hardware register, there is a chance that `hr_4` will be selected.
If it happens, codegen will operate EDX and overwrite vr_44 value.

The reason of how `hr_4` will be spilled out is a hidden bug that
both information of `rc->hreg[]` and `rc->vreg` can be transfered
from one block to the next one. It means even there is no vr binds
to a hr in current block, the hr may still be thought as a busy one
becase of the left infroamtion of previous blocks

Workaround for cases:

- Add `MOV LOCKED_hr LOCKED_hr` just after the instruction. It prevents
  case 1
- Add `MOV LOCKED_hr LOCKED_hr` just before the instruction. It prevents
  case 2
2022-05-31 11:58:02 +08:00
liang.he
8350d9860b
Unify results of SELECTCC (#1197) 2022-05-30 19:44:08 +08:00
Wenyong Huang
9e3c6acb25
Fix fast jit issues (#1193)
And implement several opcodes
2022-05-30 15:27:22 +08:00
liang.he
b01ae11217
Implement float comparison, conversion and numeric opcodes (#1170) 2022-05-24 19:03:46 +08:00
Wenyong Huang
4746eaa029 Merge main into dev/fast_jit 2022-05-18 20:35:13 +08:00
Wenyong Huang
e675564381
Fix fast jit issues (#1169)
Implement bitwise 64-bit operations in codegen
Fix and refine shift IRs
Zero local variables
Remove ref-type/bulk-memory macros
Implement set aux stack
Refine clear mem registers
2022-05-16 15:17:48 +08:00
liang.he
eec5450d26
Implement fast jit float/double load/store opcodes translation (#1165) 2022-05-10 17:23:53 +08:00
Wenyong Huang
4135622008
Fix fast jit several issues (#1163) 2022-05-10 15:22:43 +08:00
Wenyong Huang
d40eb1d3ff
Add asmjit and zydis to attributions (#1152) 2022-05-07 12:37:50 +08:00
liang.he
dd966977a5
Implement JIT IR translation for opcode call_indirect (#1138) 2022-05-06 15:31:21 +08:00
liang.he
87b259a40a
Implement opcode memory.grow and fix zydis compile error (#1123) 2022-04-27 20:02:38 +08:00
liang.he
26c4a7ca33
Only handle one const case in DEF_UNI_INT_CONST_OPS (#1122)
`DEF_UNI_INT_CONST_OPS` handle the case of both consts
2022-04-26 15:59:15 +08:00
liang.he
0377aec027
Emit JIT IRs for wasm opcode ROTL and ROTR (#1114) 2022-04-24 13:50:27 +08:00
liang.he
ab5eaef5b8
Implement I64_EXTEND_I32 and I32_WRAP_I64 for Fast JIT (#1111) 2022-04-21 18:15:56 +08:00
liang.he
0c2cac4ca2
Emit JIT IR for bitwise opcodes (#1101) 2022-04-21 17:48:24 +08:00
liang.he
50dfb2fc6c
Expand valid register number to 16 when storing (#1110)
Since locals and operands are stored in stack on a 64-bit platform
2022-04-21 16:27:39 +08:00
liang.he
94d6da28b7
Emit JIT IR for wasm opcode SHL/SHRU/SHRS (#1097) 2022-04-19 16:24:37 +08:00
liang.he
166f12fef1
Implement JIT IR for integer load/store opcodes (#1087) 2022-04-18 17:22:55 +08:00
Wenyong Huang
5f0fab03a5
Implement i32/i64 div and rem opcodes translation (#1091) 2022-04-18 11:38:10 +08:00
liang.he
f1f674bc8d
Emit JIT IRs for get/set wasm globals (#1085)
WASM_OP_SET_GLOBAL_AUX_STACK is unsupported currently
2022-04-14 14:07:37 +08:00
liang.he
8ef253a19c
Emit JIT IR for integer comparison (#1086) 2022-04-13 13:43:45 +08:00
Wenyong Huang
27446e4b14
Implement load fixed virtual regs (#1083) 2022-04-12 14:54:38 +08:00
Wenyong Huang
aeeaf4b02e
Fix fast-jit codegen lower_select issue (#1082)
Directly patch the offset in condition jmp instructions as
the offset generated by asmjit is always 0.
2022-04-12 10:23:54 +08:00
Wenyong Huang
d4fe9fcbdc
Add pointer reg and LDPTR/STPTR to refine the code (#1079)
And define the fixed virtual registers, create them at the beginning.
2022-04-12 09:01:08 +08:00
Wenyong Huang
3b7bc63274
Implement op_call for fast-jit (#1075)
Translate WASM_OP_CALL into JIT IR in the frontend, and translate
JIT_OP_CALLBC and JIT_OP_CALLNATIVE in the backend.
For calling wasm native API, simply call wasm_interp_call_func_native
to reduce the complexity.
And fix some issues, including wasm loader, frontend, register allocator,
and code gen.
2022-04-10 18:41:23 +08:00
Wenyong Huang
883ce5d875
Implement codegen lookupswitch (#1066) 2022-04-04 08:24:12 +08:00
liang.he
4d966d45ee
Fix issues of compiling control related opcodes (#1063) 2022-04-03 20:25:13 +08:00
liang.he
8113536278
Implement IR translation of BR_TABLE (#1064)
And refine IR translation of BR_IF
2022-04-02 14:02:06 +08:00
liang.he
7de695fb3a
Reset JitCompContext before compiling each function (#1062)
Or else, all secondary IRs and machine code will be appended into
the content of first function
2022-03-25 15:49:03 +08:00
Wenyong Huang
f7b6cd75c7
Implement part of codegen, add asmjit and zydis (#1050)
Implement part of codegen and fix some frontend issues
Add asmjit to emit native code and add zydis to disassemble native code
Can successfully run some simple cases
2022-03-22 12:22:04 +08:00
liang.he
0f2885cd66
Fix issues of handling op block/if/loop/else (#1049)
Since `basic_block_else` is NULL, it meets a crash if there is a
IF block without a else branch. Like:

``` wat
(func (export "params-id") (param i32) (result i32)
  (i32.const 1)
  (if (param i32) (result i32) (local.get 0)
    (then)
  )
)
```

Consider the ELSE block will be created lazily, focus on
`basic_block_entry" here.
2022-03-21 14:00:58 +08:00
liang.he
9fd3d53bc9
Reset members of jit block/value stack after destroy (#1048)
After `jit_value_stack_destory()`, the `JitValue` pointed
by `value_list_head` and `value_list_end` are freed and
still keep the value.

So, when `jit_value_stack_push()` is called, for example,
`load_block_params()` after `jit_value_stack_destroy()` in
`handle_op_else()`, `value_stack` will not be treated like
an empty one, and new `JitValue` will be appended to `value_list_end`,
which is a dangling pointer(pointer to the freed `JitValue`).
2022-03-15 20:10:48 +08:00
Wenyong Huang
eb518c0423
Refine code, fix some issues and add codegen framework (#1045)
Add more return value checks and set lass error
Implement exception throw and add operand stack overflow check
Remove lower_fe pass
Use cc->cmp_reg for cmp/branch IRs
Fix jit dump issues
Fix some compile warnings
Add part of codegen framework
Remove some unused JIT IRs
2022-03-14 15:32:32 +08:00
Wenyong Huang
24aae4f0d6
Import Fast JIT framework (#1016)
Import Fast JIT framework and translate some opcodes in the frontend.
2022-03-09 12:34:56 +08:00