Add macro WASM_ENABLE_WORD_ALING_READ to enable reading
1/2/4 and n bytes data from vram buffer, which requires 4-byte addr
alignment reading.
Eliminate XIP AOT relocations related to the below ones:
i32_div_u, f32_min, f32_max, f32_ceil, f32_floor, f32_trunc, f32_rint
Lookup table for i32.const and i64.const for xtensa XIP
Lookup const offset from table for load/store opcodes for xtensa XIP
Fill capability flags for xtensa XIP
Enable lower switch pass for xtensa XIP
Don't use constant float table on arm and riscv as LLVM doesn't generate
.LPCI/.rodata like relocations on them, the float/double constants are encoded
into instructions directly, so no need to lookup them from constant table.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Apply clang-format for core/iwasm/include, core/iwasm/common and
core/iwasm/aot files.
Update spec cases test script:
- Checkout latest commit of https://github.com/WebAssembly/spec
- Checkout main branch but not master of https://github.com/WebAssembly/threads
- Update wabt to latest version
And update source debugging document.
Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
Implement XIP (Execution In Place) feature for AOT mode to enable running the AOT code inside AOT file directly, without memory mapping the executable memory for AOT code and applying relocations for text section. Developer can use wamrc with "--enable-indirect-mode --disable-llvm-intrinsics" flags to generate the AOT file and run iwasm with "--xip" flag. Known issues: there might still be some relocations in the text section which access the ".rodata" like sections.
And also enable ARC target support for both interpreter mode and AOT mode.
Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
