Commit Graph

  • bb9f60cd5c pass non-gc spec for all modes Xu Jun 2023-12-05 14:01:46 +0800
  • 303d434259 check const expr stack overflow Xu Jun 2023-12-05 11:55:46 +0800
  • e9d07ff82a update mini loader Xu Jun 2023-12-05 09:09:57 +0800
  • d66ab4f3cb fix block with type issue in fast interp Xu Jun 2023-12-05 09:02:41 +0800
  • 8502e47d52 pass spec test for non-gc aot/jit mode Xu Jun 2023-12-05 00:01:13 +0800
  • 549972b174 Fix loader handling op_br_table and op_drop Wenyong Huang 2023-12-04 20:34:22 +0800
  • 7308b1eb00
    Update FPU configuration in spec_test_on_nuttx.yml (#2856) Huang Qi 2023-12-04 18:57:18 +0800
  • 0e0328fe09 Remove extra cast for function to pointer Huang Qi 2023-12-04 16:59:18 +0800
  • e350e65b12
    Don't add "+d" to riscv cpu features if already given (#2855) Huang Qi 2023-12-04 17:00:21 +0800
  • b0d5b8df1d
    Fix issues of build/run with llvm-17 (#2853) Wenyong Huang 2023-12-04 16:40:54 +0800
  • 88dcf09ecf Don't add "+d" to cpu features if already given Huang Qi 2023-12-04 16:05:01 +0800
  • e5a5aa09a6 Update FPU configuration in spec_test_on_nuttx.yml Huang Qi 2023-12-04 14:59:30 +0800
  • 294a9db5cc update release notes Wenyong Huang 2023-12-04 15:23:48 +0800
  • 14c99b26d7 use Wenyong Huang 2023-12-04 14:48:27 +0800
  • 453a29a9d4
    Enable spectest on riscv64 (#2843) Huang Qi 2023-12-04 14:22:47 +0800
  • 13722e4984 Add R_RISCV_PCREL_LO12_S relocation type Huang Qi 2023-12-04 12:20:00 +0800
  • 157c289d07
    Fix typos of CIDR in docs and help text (#2851) Daniel Mangum 2023-12-03 21:38:54 -0600
  • 09d4acc2c4 Fix build/run with llvm-17 issues Wenyong Huang 2023-12-04 11:23:13 +0800
  • dc1c972afc Fix typos of CIDR in docs and help text Daniel Mangum 2023-12-03 19:59:03 -0500
  • 48e24032ba
    doc/build_wamr.md: Fix links to RISC-V named ABIs (#2852) Daniel Mangum 2023-12-03 20:05:26 -0600
  • 06de02748b Fix links to RISC-V named ABIs Daniel Mangum 2023-12-03 20:24:40 -0500
  • 6ec183c942 don't commit frame_sp Wenyong Huang 2023-12-04 09:19:59 +0800
  • b86d475d06 pass spec test for non-gc interpreter mode Xu Jun 2023-12-04 03:38:56 +0800
  • 34bbd57757 update fast-interp Xu Jun 2023-12-04 02:58:18 +0800
  • 2490c94938 classic-interp pass spec test except type-subtyping Xu Jun 2023-12-04 02:36:34 +0800
  • a4efd48c4c refine code Wenyong Huang 2023-12-03 21:28:17 +0800
  • 1ef8264704
    Merge pull request #855 from bytecodealliance/dev/gc_refactor Wenyong Huang 2023-12-03 19:32:23 +0800
  • ac13613fb5 refine code, translate aot_free_frame into llvm ir Wenyong Huang 2023-12-03 19:30:38 +0800
  • 3d58ad42ca basically implement init value stack Xu Jun 2023-12-03 18:57:10 +0800
  • ce4e873561 ci: add GH action to test compilation on Zephyr deadprogram 2023-12-02 12:03:11 +0100
  • 488e6762a7 fix some spec test issues Xu Jun 2023-12-03 13:10:33 +0800
  • 73914caa9b
    core/iwasm/interpreter/wasm_loader.c: remove an extra validation (#2845) YAMAMOTO Takashi 2023-12-01 19:29:15 +0900
  • fbd9a760e7
    test_wamr.sh: Don't bother to build shared library (#2844) YAMAMOTO Takashi 2023-12-01 19:12:55 +0900
  • 3d0342fbc8
    Fix fast-jit accessing shared memory's fields issue (#2841) TianlongLiang 2023-12-01 17:41:24 +0800
  • adf359ccac cr suggestions TL 2023-12-01 17:19:55 +0800
  • e9b7006edf revert the sgx change as it was wrong YAMAMOTO Takashi 2023-12-01 18:09:27 +0900
  • 07f6018c88 Exclude XIP support for RISCV64 in spec_test_on_nuttx.yml Huang Qi 2023-12-01 11:37:14 +0800
  • cb4df2207f Fix relocation calculation in RISC-V architecture Huang Qi 2023-11-30 16:53:23 +0800
  • 13b366c8a2 Walkaround native stack overflow issue in RISCV64 target Huang Qi 2023-11-29 17:47:25 +0800
  • 0ebc057fad Use -mcmodel=medany for rv64 Huang Qi 2023-11-29 15:12:49 +0800
  • 84f2a68161 Enable bounds checks for qemu on 64-bit targets Huang Qi 2023-11-29 11:31:53 +0800
  • 428cc941bd Enable sepctest for riscv64 Huang Qi 2023-11-28 16:53:31 +0800
  • 69b354c137 core/iwasm/interpreter/wasm_loader.c: remove an extra validation YAMAMOTO Takashi 2023-12-01 17:45:03 +0900
  • bf3978dd1e tests/wamr-test-suites/test_wamr.sh: don't bother to build shared library YAMAMOTO Takashi 2023-12-01 17:49:40 +0900
  • 6d664135c6 some refactor TL 2023-12-01 16:45:31 +0800
  • 162a977006
    Use wasm_config_t to pass private configuration to wasm_engine_new (#2837) liang.he 2023-12-01 12:34:11 +0800
  • 718f0671e7
    Output warning and quit if import/export name contains '\00' (#2806) liang.he 2023-12-01 11:14:13 +0800
  • b887ce585a quit if meets an export name contains '\00' liang.he@intel.com 2023-11-24 08:39:03 +0000
  • 4271ffa2a1 use wasm_config_t to pass embedded private configuration liang.he@intel.com 2023-11-29 05:43:15 +0000
  • af09acec2e fix typo Xu Jun 2023-11-30 21:53:34 +0800
  • a8f4c27646 indirect access to memory instance's data member when shared memory is enabled TL 2023-11-30 14:25:27 +0800
  • 320343b7dc add icon FromLiQg 2023-11-30 11:00:10 +0800
  • 873558c40e
    Get rid of compilation warnings and minor doc fix (#2839) Enrico Loparco 2023-11-30 00:49:58 +0000
  • ca47802771 fix: get rid of compilation warnings and minor doc fix eloparco 2023-11-29 09:20:32 +0000
  • 0455071fc1
    Access linear memory size atomically (#2834) Enrico Loparco 2023-11-29 12:27:17 +0000
  • 81552abdd2 fix: access linear memory size atomically eloparco 2023-11-28 17:06:54 +0000
  • e98fef93eb Disable ems memory allocator heap corruption check when GC is enabled Wenyong Huang 2023-11-29 14:03:29 +0800
  • ebbf48869f
    Merge pull request #853 from bytecodealliance/dev/gc_refactor Wenyong Huang 2023-11-29 13:50:55 +0800
  • 639b08b9ae update release notes Wenyong Huang 2023-11-28 13:55:13 +0800
  • b0c23be3a9 add a user tip about flamegraph liang.he@intel.com 2023-11-28 02:56:03 +0000
  • 8c5cab1d52 revert changes, only export wasm_runtime_shared_mem_lock/unlock Wenyong Huang 2023-11-27 19:28:23 +0800
  • 3e7e147694 Refine aot_alloc_frame Wenyong Huang 2023-11-27 19:17:36 +0800
  • a1b0bb307f enable jitdump for linux perf liang.he@intel.com 2023-11-14 01:45:36 +0000
  • 143d51f86d Fix target name conversion issue in spec-test-script Huang Qi 2023-11-27 12:16:18 +0800
  • e68411cb7b Update AOT compilation options for x86_32 target Huang Qi 2023-11-27 11:46:53 +0800
  • 9e0b949c59 Add __floatundidf symbol to target_sym_map Huang Qi 2023-11-27 11:37:48 +0800
  • 4a97f4fe11 Commented out unused configuration for riscv64 target Huang Qi 2023-11-27 11:31:10 +0800
  • f85b247a8d Update target configuration and install ARM compilers Huang Qi 2023-11-27 10:51:37 +0800
  • 6ec2af9566 Update target configurations in spec_test_on_nuttx.yml Huang Qi 2023-11-27 10:34:10 +0800
  • cea1aea8a9 print help when meeting unknown cmd options liang.he@intel.com 2023-11-27 02:28:56 +0000
  • 4bc81f3922 Fix typos in libsodium workload Wenyong Huang 2023-11-26 17:48:37 +0800
  • 51182ea09c rename opcodes Xu Jun 2023-11-26 14:44:18 +0800
  • 671cb5fc19 refine heap type checking Xu Jun 2023-11-26 14:34:03 +0800
  • 78e7e940da minor fix Xu Jun 2023-11-26 13:20:57 +0800
  • ee09ed74d8 auto format Xu Jun 2023-11-26 05:19:57 +0800
  • 93138422dc sync up with latest gc spec Xu Jun 2023-11-26 05:08:59 +0800
  • 8e5ab79968
    Disable ems memory allocator heap corruption check when GC is enabled (#2838) Wenyong Huang 2023-11-29 20:28:12 +0800
  • 9c71ca6c46 Merge branch main into dev/gc_refactor Wenyong Huang 2023-11-29 09:23:00 +0800
  • b81abd01ef
    Add a user tip about flamegraph (#2827) liang.he 2023-11-28 13:46:14 +0800
  • 238208a6bd
    Refine the GC frame ref flag commit (#2822) Wenyong Huang 2023-11-27 18:17:35 +0800
  • 1d0f789754
    Fix typos in libsodium workload (#2825) Wenyong Huang 2023-11-27 15:53:37 +0800
  • 8aa813f44a
    Generate jitdump to support linux perf for LLVM JIT (#2788) liang.he 2023-11-27 15:42:00 +0800
  • d7608690c0
    Run spec test for classic/fast-interp in NuttX CI (#2817) Huang Qi 2023-11-27 15:24:02 +0800
  • 5377e18623
    iwasm: Print help when meeting unknown cmd options (#2824) liang.he 2023-11-27 11:16:54 +0800
  • 77d27c9ff6
    Enable stringref aot (#2816) Xu Jun 2023-11-27 10:50:12 +0800
  • 4a92be3f61 Fix missing symbol in RISC-V relocation Huang Qi 2023-11-25 22:24:08 +0800
  • cbcd776821 Fix target configuration in spec_test_on_nuttx.yml Huang Qi 2023-11-25 22:08:42 +0800
  • d2c2284046 Disable unused target configurations Huang Qi 2023-11-25 22:05:51 +0800
  • 4168ab127d Refactor target configurations in spec_test_on_nuttx.yml Huang Qi 2023-11-25 20:38:07 +0800
  • 5737392446 Refactor QEMU command for different architectures Huang Qi 2023-11-25 20:22:36 +0800
  • d9f57dc01e Refactor target action in main function Huang Qi 2023-11-25 20:01:02 +0800
  • c3802cb6de Add error message Huang Qi 2023-11-24 15:13:41 +0000
  • c4ca06aded Fix qemu command Huang Qi 2023-11-24 15:00:28 +0000
  • a8a24e8176 Debug Huang Qi 2023-11-24 13:26:01 +0000
  • 40f7c65bee Try to fix cmd Huang Qi 2023-11-24 12:29:38 +0000
  • c09ee41097 Don't use neon extension for cortex-a9 Huang Qi 2023-11-24 11:59:30 +0000
  • b14de9689f Update target mappings in all.py Huang Qi 2023-11-24 18:33:27 +0800
  • c958f06d39 Update nuttx build and test configurations Huang Qi 2023-11-24 17:46:23 +0800
  • d2da8ec230 Update AOT compilation options for different targets Huang Qi 2023-11-24 16:59:58 +0800
  • 2ffc526673 Fix compile target options in test_wamr.sh Huang Qi 2023-11-24 16:48:21 +0800